Image handling is instrumental in many applications, including consumer electronics, surveillance, robotics, machine vision, etc. Some of them demand high quality images, while others require fast analysis and interpretation of the image flow. Despite the specific target, all applications benefit from embedding processing circuitry together with optical sensors in the same silicon substrate. CMOS technologies allow the incorporation of digital processing on-chip to correct image artifacts or to analyze and interpret the scene in real-time. Using CMOS technologies enables the implementation of cameras and vision systems with reduced power consumption and reduced size. This permits the incorporation of vision in applications where it was previously considered to be economically prohibitive or technically unfeasible.

This research line embraces different activities related to the incorporation of intelligence into image sensors, namely:

• New pixel topologies for enhanced sensitivity and reduced noise.
• Front-side and Back-side illuminated sensors.
• Pixels for single-photon detection and time-of-flight calculations.
• Pixels for high-dynamic range image acquisition.
• In-pixel processing and memory for feature extraction at the focal-plane.
• Re-configurable read-out channels for high-performance digital imagers.
• Data converters for high-speed and high accuracy (low noise) image downloading.
• Architectures and algorithms for on-chip image correction.
• Distributed, progressive processing architectures for vision systems.
• Sensors for 3-D image capture.

Different application areas are covered like automotive, unmanned vehicle navigation, distributed smart cameras and vision-enabled wireless sensor networks. These applications have been benchmarked by using real systems. Significant parts of the technology have been transferred to industry, including the creation of spin-off companies.

Contact

Ángel Rodríguez Vázquez<  >

Ricardo Carmona Galán<  >

J. Fernandez-Berni, R. Carmona-Galan and A. Rodriguez-Vazquez, Low-Power Smart Imagers for Vision-Enabled Sensor Networks, Springer, 2012  »  doi

J. Fernandez-Berni, R. Carmona-Galan and L. Carranza-Gonzalez. "FLIP-Q: A QCIF Resolution Focal-Plane Array for Low-Power Image Processing", IEEE Journal of Solid-State Circuits, vol. 46, no. 3, pp. 669-680, 2011  »  doi

G. Liñan, A. Rodriguez-Vazquez, R. Carmona, F. Jimenez, S. Espejo and R. Dominguez-Castro, "A 1000 FPS@128x128 Vision Processor with 8-bit Digitized I/O", IEEE Journal of Solid-State Circuits, vol 39, no. 7, pp. 1044-1055, 2004  »  doi

A. Rodriguez-Vazquez, G. Liñan, L. Carranza, E. Roca, R. Carmona, F. Jimenez-Garrido, and R. Dominguez-Castro, "ACE16k: the Third Generation of Mixed-Signal SIMD-CNN ACE Chips towards VSoCs", IEEE Transactions on Circuit and Systems I: Fundamental Theory and Applications, vol. 51, no. 5, pp. 851-863, 2004  »  doi

T. Roska and A. Rodriguez-Vazquez (Eds.), Towards the Visual Microprocessor: VLSI Design and the Use of Cellular Neural Network Universal Machine Computers, pp. 213-237, John Wiley & Sons, 2001  »  link

3DHVC: Design of high-performance heterogeneous, ultra high speed cellular sensor-processors for multispectral light sensing (BAA-11-001)
PI: Ángel Rodríguez Vázquez
Funding Body: Office of Naval Research (USA)
Jan 2011 - Dec 2013

WIVISNET: Wireless and smart vision sensors for networked surveillance and monitoring (TEC2009-11812)
PI: Ricardo Carmona Galán
Funding Body: Min. de Ciencia e Innovación
Jan 2010 - Dec 2012
WEBSITE

VISTA: Design of sensing-processing-actuation systems on-a-chip: 4th generation vision systems (TIC2003-09817-C02-C01)
PI: Ángel Rodríguez Vázquez
Funding Body: Min. de Ciencia y Tecnología
Dec 2003 - Nov 2006