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A switched-capacitor skew-tent map implementation for random number generation
J.L. Valtierra, E. Tlelo-Cuautle and A. Rodriguez-Vazquez
Journal Paper - International Journal of Circuit Theory and Applications, vol. 45, no. 2, pp 305-315, 2017
JOHN WILEY & SONS    DOI: 10.1002/cta.2305    ISSN: 0098-9886    » doi
[abstract]
Piecewise linear one-dimensional maps have been proposed as the basis for low-power analog and mixed-signal true random number generators (TRNGs). Recent research has moved towards conceiving maps that operate robustly under the consideration of parameter variations. In this paper, we introduce an oscillator circuit mapping a low-complexity map known as the skew-tent. This oscillator is employed as the basis for a TRNG scheme. Simulation results in TSMC 0.18 μm validate the chaotic oscillator and the randomness of the TRNG scheme is verified with the NIST test suite 800-22.

Guest Editorial 'Secure lightweight crypto-hardware'
A.J. Acosta and T. Addabbo
Journal Paper - International Journal of Circuit Theory and Applications, vol. 45, no. 2, pp 143-144, 2017
JOHN WILEY & SONS    DOI: 10.1002/cta.2302    ISSN: 0098-9886    » doi
[abstract]
Abstract not avaliable

Incubating terns modify risk-taking according to diurnal variations in egg camouflage and ambient temperature
J.A. Amat, J. Gómez, G. Liñán-Cembrano, M.A. Rendón and C. Ramo
Journal Paper - Behavioral Ecology and Sociobiology, vol. 71, no. 4, 2017
SPRINGER    DOI: 10.1007/s00265-017-2306-4    ISSN: 0340-5443    » doi
[abstract]
Studies of risk-taking by breeding birds have frequently addressed the effect of brood value on the decisions taken by incubating birds when predators approach their nests. However, leaving eggs unattended during predator disturbance may expose embryos to other potentially harmful factors, to which parent birds should respond when making decisions about when to leave or return to their nest. In this study, we show that diurnal changes in flushing behaviour of incubating terns from nests during predator approach were affected by egg camouflage, the terns allowing a closer approach to individual nests when the eggs appeared better camouflaged. Return times to the nests were affected by ambient temperature, with the terns shortening such times at high ambient temperatures, thus diminishing the risk of egg overheating. As a whole, our results show that the decisions of the birds on when to leave or return to their nests depended on shifting payoffs, as a consequence of diurnal variations in both the thermal risks incurred by embryos and egg crypsis. Environmental costs of risk-taking, such as those considered here, should be addressed in studies of risk-taking by breeding birds. This type of study may have implications for our knowledge of cognitive processes that affect risk-taking.

Parametric macromodeling of integrated inductors for RF circuit design
F. Passos, Y. Ye, D. Spina, E. Roca, R. Castro-López, T. Dhaene and F.V. Fernández
Journal Paper - Microwave and Optical Technology Letters, vol. 59, no. 5, pp 1207-1212, 2017
JOHN WILEY & SONS    DOI: 10.1002/mop.30498    ISSN: 1098-2760    » doi
[abstract]
Nowadays, parametric macromodeling techniques are widely used to describe electromagnetic structures. In this contribution, the application of such parametric macromodeling techniques to the design of integrated inductors and radio-frequency circuit design is investigated. In order to allow such different operations, a new modeling methodology is proposed, which improves the modeling accuracy when compared to former techniques. The new methodology is tailored to the unique characteristics of the devices under study. The obtained parametric macromodel is then used in a synthesis methodology and in the design of a voltage controlled oscillator in a 0.35-μm CMOS technology.

In the quest of vision-sensors-on-chip: Pre-processing sensors for data reduction
A. Rodríguez-Vázquez
Conference - IS&T International Symposium on Electronic Imaging 2017
[abstract]
Abstract not available

A CMOS Digital SiPM with Focal-Plane Light-Spot Statistics for DOI Computation
I. Vornicu, F.N. Bandi and R. Carmona-Galán
Journal Paper - IEEE Sensors Journal, vol. 17, no. 3, pp 632-643, 2017
IEEE    DOI: 10.1109/JSEN.2016.2632200    ISSN: 1530-437X     » doi
[abstract]
Silicon photomultipliers can be used to infer the depth-of-interaction (DOI) in scintillator crystals. DOI can help to improve the quality of the positron emission tomography images affected by the parallax error. This paper contemplates the computation of DOI based on the standard deviation of the light distribution. The simulations have been carried out by GAMOS. The design of the proposed digital silicon photomultiplier (d-SiPM) with focal plane detection of the center of mass position and dispersion of the scintillation light is presented. The d-SiPM shares the same off-chip time-to-digital converter such that each pixel can be individually connected to it. A miniature d-SiPM 8×8 single-photon avalanche-diode (SPAD) array has been fabricated as a proof of concept. The SPADs along each row and column are connected through an OR combination technique. It has 256×256μm2 without peripherals circuits and pads. The fill factor is about 11%. The average dark count rate of the mini d-SiPM is of 240 kHz. The average photon detection efficiency is 5% at 480 nm wavelength, room temperature, and 0.9 V excess voltage. The dynamic range is of 96 dB. The sensor array features a time resolution of 212 ps. The photon-timing SNR is 81 dB. The focal plane statistics of the light-spot has been proved as well by measurements.

Black-Box Calibration for ADCs with Hard Nonlinear Errors using a Novel INL-Based Additive Code: A Pipeline ADC Case Study
A.J. Ginés, E.J. Peralías and A. Rueda
Journal Paper - IEEE Transactions on Circuits and Systems I-Regular Papers, first online, 2017
IEEE    DOI: 10.1109/TCSI.2017.2662085    ISSN: 1549-8328    » doi
[abstract]
This paper presents a digital nonlinearity calibration technique for ADCs with strong input-output discontinuities between adjacent codes, such as pipeline, algorithmic, and SAR ADCs with redundancy. In this kind of converter, the ADC transfer function often involves multivalued regions, where conventional integral-nonlinearity (INL)-based calibration methods tend to miscalibrate, negatively affecting the ADC's performance. As a solution to this problem, this paper proposes a novel INL-based calibration which incorporates information from the ADC's internal signals to provide a robust estimation of static nonlinear errors for multivalued ADCs. The method is fully generalizable and can be applied to any existing design as long as there is access to internal digital signals. In pipeline or subranging ADCs, this implies access to partial subcodes before digital correction; for algorithmic or SAR ADCs, conversion bit/bits per cycle are used. As a proof-of-concept demonstrator, the experimental results for a 1.2 V 23 mW 130 nm-CMOS pipeline ADC with a SINAD of 58.4 dBc (in nominal conditions without calibration) is considered. In a stressed situation with 0.95 V of supply, the ADC has SINAD values of 47.8 dBc and 56.1 dBc, respectively, before and after calibration (total power consumption, including the calibration logic, being 15.4 mW).

A CMOS Tracking System Approach for Cell Motility Assays
C. Martínez-Gómez, A. Olmo, G. Huertas, P. Pérez, A. Maldonado-Jacobi and A. Yufera
Conference - International Conference on Biomedical Electronics and Devices BIODEVICES 2017
[abstract]
This work proposes a method for studying and monitoring in real-time a single cell on a 2D electrode matrix, of great interest in cell motility assays and in the characterization of cancer cell metastasis. A CMOS system proposal for cell location based on occupation maps data generated from Electrical Cell-substrate Impedance Spectroscopy (ECIS) has been developed. From this cell model, obtained from experimental assays data, an algorithm based on analysis of the 8 nearest neighbors has been implemented, allowing the evaluation of the cell center of mass. The path followed by a cell, proposing a Brownian route, has been simulated with the proposed algorithm. The presented results show the success of the approach, with accuracy over 95% in the determination of any coordinate (x, y) from the expected center of mass.

System-Level Design of a 64-Channel Low Power Neural Spike Recording Sensor
M. Delgado-Restituto, A. Rodriguez-Perez, A. Darie, C. Soto, E. Fernandez and A. Rodriguez-Vazquez
Journal Paper - IEEE Transactions on Biomedical Circuits and Systems, first online, 2017
IEEE    DOI: 10.1109/TBCAS.2016.2618319    ISSN: 1932-4545    » doi
[abstract]
This paper reports an integrated 64-channel neural spike recording sensor, together with all the circuitry to process and configure the channels, process the neural data, transmit via a wireless link the information and receive the required instructions. Neural signals are acquired, filtered, digitized and compressed in the channels. Additionally, each channel implements an auto-calibration algorithm which individually configures the transfer characteristics of the recording site. The system has two transmission modes; in one case the information captured by the channels is sent as uncompressed raw data; in the other, feature vectors extracted from the detected neural spikes are released. Data streams coming from the channels are serialized by the embedded digital processor. Experimental results, including in vivo measurements, show that the power consumption of the complete system is lower than 330 μW.

Low-Power CMOS Vision Sensor for Gaussian Pyramid Extraction
M. Suárez, V.M. Brea, J. Fernández-Berni, R. Carmona-Galán, D. Cabello and A. Rodríguez-Vázquez
Journal Paper - IEEE Journal of Solid-State Circuits, vol. 52, no. 2, pp 483-495, 2017
IEEE    DOI: 10.1109/JSSC.2016.2610580    ISSN: 0018-9200    » doi
[abstract]
This paper introduces a CMOS vision sensor chip in a standard 0.18 μm CMOS technology for Gaussian pyramid extraction. The Gaussian pyramid provides computer vision algorithms with scale invariance, which permits having the same response regardless of the distance of the scene to the camera. The chip comprises 176 x 120 photosensors arranged into 88 x 60 processing elements (PEs). The Gaussian pyramid is generated with a double-Euler switched capacitor (SC) network. Every PE comprises four photodiodes, one 8 b single-slope analog-to-digital converter, one correlated double sampling circuit, and four state capacitors with their corresponding switches to implement the double-Euler SC network. Every PE occupies 44 x 44 μm^2. Measurements from the chip are presented to assess the accuracy of the generated Gaussian pyramid for visual tracking applications. Error levels are below 2% full-scale output, thus making the chip feasible for these applications. Also, energy cost is 26.5 nJ/px at 2.64 Mpx/s, thus outperforming conventional solutions of imager plus microprocessor unit.

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