News


Visita profesora Ileana Buhan IMSE
Visit by Professor Ileana Buhan, Expert in Digital Security

On July 17 and 18, we had the pleasure of welcoming Professor Ileana Buhan to our facilities. She comes from Radboud University in Nijmegen and is a specialist in digital security. Ileana's research focuses on the design and development of secure digital systems
July 21, 2025

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IMSE fotonica Proyecto SQPRIM
Shedding light on the darkness of cyberspace

Do you use social media to stay connected with family and friends? Do you entertain yourself with virtual games and online videos? Have you ever ordered food or clothes for home delivery? If the answer to any of these questions is yes, then you're already living in cyberspace!
July 16, 2025

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Electronic wear prediction
IMSE opens its doors to the science of the future

More than 400 students have explored the world of microelectronics during the 2024-2025 academic year in a commitment to disseminating and promoting scientific vocations.
July 8, 2025

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Electronic wear prediction
Accelerating electronic wear prediction

IMSE proposes efficient solutions for modeling large-scale circuit degradation..
July 7, 2025

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Visita IMSE Ministro Transformación Digital
The IMSE welcomes the Minister of Digital Transformation on a key day to foster public-private collaboration

The Minister toured the IMSE facilities to gain first-hand insight into the center's research activities and technological potential in the field of microelectronics.
July 2, 2025

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Antonio Dominguez Beca Ramón y Cajal
A postdoctoral researcher at IMSE awarded the prestigious Ramón y Cajal fellowship

This fellowship, promoted by the Ministry of Science, Innovation and Universities, supports the incorporation of highly qualified research talent into the Spanish R&D&I system.
June 23, 2025

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PREVIOUS EVENTS & NEWS

New Director of the IMSE-CNM


IMSE researcher Teresa Serrano Gotarredona has been appointed as the new Director of the Instituto de Microelectrónica de Sevilla.

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Education at IMSE


- Doctoral Studies
- Master Studies
- Degree Studies
- Final Degree Projects
- Internships

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Recent publications


A Side-Channel Protected and High-Performance Hardware Implementation for EdDSA25519
P. Navarro-Torrero, E. Camacho-Ruiz, M.C. Martínez-Rodríguez and P. Brox
Journal Paper · IEEE Access Vol 13
IEEE    ISSN: 2169-3536
abstract      doi      

This paper presents a high-performance and secure hardware implementation of the Edwards-Curve Digital Signature Algorithm (EdDSA25519). Using the fixed-base signed multi-comb and the k-ary algorithms for scalar multiplication, the proposed design achieves 307%, 253%, and 48% faster performance in key generation, signature generation, and signature verification, respectively, compared to the fastest previous hardware implementation in the state-of-the-art. When compared to the software-based OpenSSL implementation, our design demonstrates timing performance improvements ranging from 1000% to 2200%. Additionally, we integrate robust Side-Channel Attack (SCA) countermeasures and validate their effectiveness through Test Vector Leakage Assessment (TVLA). The results demonstrate increased resistance to Simple Power Analysis (SPA) and Differential Power Analysis (DPA), offering a hardware-based secure solution for modern cryptographic applications.

Workload Compression Techniques to Scale Defect-Centric BTI Models to the Circuit Level
A. Santana-Andreo, V.M. van Santen, R. Castro-López, E. Roca, H. Amrouch and F.V. Fernández
Journal Paper · IEEE Transactions on Circuits and Systems I: Regular Papers (Early Access), 2025
IEEE    ISSN: 1549-8328
abstract      doi      

Bias Temperature Instability (BTI) poses a significant challenge in ensuring the reliability of digital systems, affecting the delay of digital logic gates, which ultimately can lead into timing failures. Sophisticated defect-centric models have been developed and successfully calibrated against empirical data to forecast the impacts of BTI at the device level. However, their application to large-scale digital circuits operating under realistic workloads over typical system lifetimes is limited because of the computational complexity of defect-centric models. To make the application of aging models in that context feasible, a useful technique is to compress the transistor workloads into simplified and hence manageable representative workloads. While fast in terms of execution speed, previous techniques struggle with accuracy when predicting aging degradation, and can reach a very high average error in threshold voltage increase prediction. In this work, we review the compression techniques described in the literature and propose two novel approaches that surpass existing ones in terms of accuracy, which is demonstrated for a complex digital design used as benchmark. Specifically, our best compression technique matches the predictions obtained through the reference uncompressed workloads, introducing negligible error, and maintains low execution times to efficiently and accurately scale defect-centric models to the circuit level.

TVLA assessment and proposed countemeasures on the hardware implementation of EdDSA25519
P. Navarro-Torrero, E. Camacho-Ruiz, M.C. Martinez-Rodriguez and P. Brox
Conference · Demo in the University Fait at DATE (Design, Automation and Test in Europe Conference) 2025, Marzo 31-Abril 2, 2025 (https://www.date-conference.com)
abstract     

Abstract not available

VLSI Integration of a Physical Unclonable Function as identifier and key generator
P. Ortega-Castro, M.C. Martinez-Rodriguez and P. Brox
Conference · Demo in the University Fait at DATE (Design, Automation and Test in Europe Conference) 2025, Marzo 31-Abril 2, 2025 (https://www.date-conference.com)
abstract     

Abstract not available

ALL PUBLICATIONS

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What we do


Our main area of specialization is the design of CMOS analog and mixed-signal integrated circuits and their use in different application contexts such as wireless communications, data conversion, smart imagers & vision sensors, biomedical devices, cybersecurity, neuromorphic computing and space technologies.

The IMSE-CNM staff consists of approximately one hundred people, including scientists and support personnel. IMSE-CNM employees are involved in advancing scientific knowledge, designing high level scientific-technical solutions and in technology transfer.

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