This research line embraces all activities related to the conception and design of basic building blocks and mixed-signal subsystems for system-on-chip implementation in CMOS nanometric technologies. Emphasis is placed on topologies and methods for low-voltage operation with very low power consumption. This is a transversal line whose activities intersect and provide support to the other research lines of the group. Typically building blocks and subsystems are designed for inclusion into chips implementing different system-level functions. Activities in this line include:

• Conception of new topologies for analog and mixed-signal building blocks suitable for deep submicron technologies.
• Modeling of second-order phenomena for these topologies. Embodiment of these models to support analog design flows.
• Development of design plans aimed to achieving high-performance with minimum power budget.
• Identification and exploration of fundamental limits and scaling performance of these building blocks.
• Exploration of architectural solutions for low-power operation, including power optimization, power management, smart stand-by control, etc.
• Conception of optimum architectural solutions for block programmability, error correction and calibration.
• etc.

All application areas are covered, namely, from low-noise sensor interfaces to high-frequency communications. All major analog and mixed-signal functions embedded into systems are explored. The group has been active in analog and mixed-signal design since the late eighties and through these years have devised many different kind of building blocks for smart imaging chips, automotive sensors, wireline and wireless communications, RFID, neuro-fuzzy adaptive systems, etc.

Contact

Óscar Guerra Vinuesa<  >

Ángel Rodríguez Vázquez<  >

A. Rodriguez-Perez, J. Ruiz-Amaya, M. Delgado-Restituto and A. Rodriguez-Vazquez, "A Low-Power Programmable Neural Spike Detection Channel with Embedded Calibration and Data Compression", IEEE Transactions on Biomedical Circuits and Systems, vol. 6, no. 2, pp. 87-100, 2012  »  doi

J.A. Rodriguez-Rodriguez, M. Delgado-Restituto, J. Masuch, A. Rodriguez-Perez, E. Alarcon and A. Rodriguez-Vazquez, "An Ultralow-Power Mixed-Signal Back End for Passive Sensor UHF RFID Transponders", IEEE Transactions on Industrial Electronics, vol. 59, no. 2, pp. 1310-1322, 2012  »  doi

J.A. Rodriguez-Rodriguez and M. Delgado-Restituto, "A low-power baseband processor for passive RFID tags employing low-power design techniques", in A.N. Laskovski (Ed.), Advances in RFID Tags, InTech, 2011

J. Ruiz-Amaya, M. Delgado-Restituto and A. Rodriguez-Vazquez. "A 1.2V 10-Bit 60-MS/s 23mW CMOS Pipeline ADC with 0.67pJ/Conversion-Step and Onchip Reference Voltage Generator", Analog Integrated Circuits and Signal Processing, vol. 71, no. 3, pp. 371-381, 2011  »  doi

J. Fernandez-Berni, R. Carmona-Galan, F. Pozas-Flores, A. Zarandy and A. Rodriguez-Vazquez. "Multi-Resolution Low-Power Gaussian Filtering by Reconfigurable Focal-Plane Binning", Proc. SPIE 8068, Bioelectronics, Biomedical, and Bioinspired Systems V; and Nanotechnology V, 806806, Prague, Czech Republic, 2011  »  doi

AFLS4K: Diseño micro-electrónico de un sensor lineal de alta velocidad para aplicaciones de inspección de procesos industriales (0619/0076)
PI: Óscar Guerra Vinuesa
Funding Company: Innovaciones Microelectrónicas
2009

BIOTAG: Monolithic Implementation of Passive RFID Transponders for Biomedical Applications (TIC-02818)
PI: Manuel Delgado Restituto
Funding Body: Proyectos de Excelencia, Junta de Andalucía
2008

MIXMODEST: Mixed Mode In Deep Submicron Technologies (ESPRIT-29261)
PI: Ángel Rodríguez Vázquez
Funding Body: Otros Programas, Organismos Públicos Europeos
1998