Found results matching for:
Author: María del C. Baena Oliva
Year: Since 2002
Journal Papers
Breaking Trivium Stream Cipher Implemented in ASIC using Experimental Attacks and DFA
F.E. Potestad-Ordóñez, M. Valencia-Barrero, C. Baena-Oliva, P. Parra-Fernández and C.J. Jiménez-Fernández
Journal Paper · Sensors, vol. 20, no.23, article 6909, 2020
abstract
doi
One of the best methods to improve the security of cryptographic systems used to exchange sensitive information is to attack them to find their vulnerabilities and to strengthen them in subsequent designs. Trivium stream cipher is one of the lightweight ciphers designed for security applications in the Internet of things (IoT). In this paper, we present a complete setup to attack ASIC implementations of Trivium which allows recovering the secret keys using the active non-invasive technique attack of clock manipulation, combined with Differential Fault Analysis (DFA) cryptanalysis. The attack system is able to inject effective transient faults into the Trivium in a clock cycle and sample the faulty output. Then, the internal state of the Trivium is recovered using the DFA cryptanalysis through the comparison between the correct and the faulty outputs. Finally, a backward version of Trivium was also designed to go back and get the secret keys from the initial internal states. The key recovery has been verified with numerous simulations data attacks and used with the experimental data obtained from the Application Specific Integrated Circuit (ASIC) Trivium. The secret key of the Trivium were recovered experimentally in 100% of the attempts, considering a real scenario and minimum assumptions.
An Academic Approach to FPGA Design Based on a Distance Meter Circuit
C.J. Jimenez-Fernandez, C. Baena-Oliva, P. Parra-Fernandez, F.E. Potestad-Ordonez and M. Valencia-Barrero
Journal Paper · IEEE Revista Iberoamericana de Tecnologías del Aprendizaje, vol. 15, no. 3, pp 123-128, 2020
abstract
doi
Digital design learning at Register Transfer (RT) level requires practical and complex examples as learning progresses. FPGAs and development boards offer a suitable platform for the implementation of these designs. However, classroom practice sessions usually last two hours, which does not allow the complexity of the designs be high enough. For this reason, interesting designs that can be made in several sessions are required. In this paper, the construction of a distance measuring system is presented. For this purpose, a distance measurement module based on ultrasound is available, the results are displayed in 7-segment displays on a Nexys4 board. This approach has been applied to three Electronic subjects at the University of Seville. The degree of satisfaction on the part of the students as well as the result of the evaluation of the experience by the teachers involved are shown.
Conferences
Teaching based on proposed by students designs: a case study
C.J. Jimenez-Fernandez, C. Baena-Oliva, P. Parra-Fernandez, M. Valencia-Barrero, F.E. Potestad-Ordoñez, E. Tena-Sanchez and A. Gallardo-Soto
Conference · Congreso de Tecnología, Aprendizaje y Enseñanza de la Electrónica TAEE 2022
abstract
Learning digital design at RT level is enhanced by practical, lab-based tasks. These tasks, if chosen appropriately, can be highly motivating. The fact that the proposal is attractive to students is an important incentive. Working with FPGAs and development boards is a very suitable tool for carrying out designs of varying complexity. This paper presents an experience developed in the Advanced Digital Design course (4th year of the Degree) consisting of a design on FPGA proposed by the students themselves based on some common specifications, such as the use of a matrix of 8x8 LEDs and that the design has to interact with some external element.
ICs tester design and its effect on application in electronics laboratories
F.E. Potestad-Ordonez, C.J. Jimenez-Fernandez, A. Gallardo-Soto, M. Valencia-Barrero, C. Baena-Oliva, P. Parra-Fernandez and E. Tena-Sanchez
Conference · Congreso de Tecnología, Aprendizaje y Enseñanza de la Electrónica TAEE 2022
abstract
One of the best methods to help students assimilate the theoretical concepts about electronic circuits is to perform laboratory sessions with real components. Therefore, the use of integrated circuits in electronics laboratory sessions and exams is very common. Since the electronic training of the students is very different, it is frequent that the devices break and become useless after a bad connection or manipulation. This paper presents the design of an integrated circuit tester, specifically the 741 and 74LS00. The effect observed on the attitude of the students after using the device (functionality check performed with the student there), before the practical sessions and laboratory exams, will be presented, and the different impressions from the point of view of the teachers will be analyzed.
Review of Breaking Trivium Stream Cipher Implemented in ASIC using Experimental Attacks and DFA
F.E. Potestad-Ordoñez, E. Tena-Sánchez, C. Fernández-García, V. Zúñiga-González, J.M. Mora Gutiérrez, C. Baena-Oliva, P. Parra-Fernández, A.J. Acosta-Jiménez and C.J. Jiménez-Fernández
Conference · Jornadas Nacionales de Investigación en Ciberseguridad JNIC 2022
abstract
In this paper, we present a review of the work [1]. In this work a complete setup to break ASIC implementations of standard Trivium stream cipher was presented. The setup allows to recover the secret keys combining the use of the active noninvasive technique attack of clock manipulation and Differential Fault Analysis (DFA) cryptanalysis. The attack system is able to inject transient faults into the Trivium in a clock cycle and sample the faulty output. Then, the internal state of the Trivium is recovered using the DFA cryptanalysis through the comparison between the correct and the faulty outputs. The secret key of the Trivium were recovered experimentally in 100% of the attempts, considering a real scenario and minimum assumptions.
[1] F.E. Potestad-Ordoñez, M. Valencia-Barrero, C. Baena-Oliva, P. Parra-Fernández, C.J. Jiménez-Fernández, "Breaking Trivium Stream Cipher Implemented in ASIC using Experimental Attacks and DFA". In Sensors, vol. 20, num. 6909, pp. 1-19, 2020.
Learning VHDL through teamwork FPGA game design
C.J. Jimenez-Fernandez, C. Baena-Oliva, P. Parra-Fernandez, A. Gallardo-Soto, F.E Potestad-Ordoñez and M. Valencia-Barrero
Conference · Congreso de Tecnología, Aprendizaje y Enseñanza de la Electrónica TAEE 2020
abstract
The learning of digital design at the RT level by the students improves with practical work, which can be developed in teams, allow both the gradual advance of complexity as the learning progresses, and the proposal to be attractive to them, such as playing simple games. FPGAs and development boards offer a very suitable platform for the implementation of these designs. This paper presents a work in the Advanced Digital Design course (4th year of the Degree) consisting of the construction of a slightly adapted version of the game "Simon Says" in which the player must memorize a sequence that becomes more difficult for as levels pass. The work, which occupies the second half of the semester, is carried out by teams of three students and must have a demonstrator implemented on a Digilent Nexys4-DDR board.
Floorplanning as a practical countermeasure against clock fault attack in Trivium stream cipher
F.E. Potestad-Ordóñez, C.J. Jiménez-Fernández, M. Valencia-Barrero, C. Baena and P. Parra
Conference · Conference on Design of Circuits and Integrated Systems DCIS 2018
abstract
The fault injection in ciphers operation is a very successful mechanism to attack them. The inclusion of elements of protection against this kind of attacks is more and more necessary. These mechanisms are usually based on introducing redundancy, which leads to a greater consumption of resources or a longer processing time. This article presents how the introduction of placement restrictions on ciphers can make it difficult to inject faults by altering the clock signal. It is therefore a countermeasure that neither increases the consumption of resources nor the processing time. This mechanism has been tested on FPGA implementations of the Trivium cipher. Several tests have been performed on a Spartan 3E device from Xilinx and the experimental measurements have been carried out with ChipScope Pro. The tests showed that an adequate floorplanning is a good countermeasure against these kind of attacks.
FPGA design example for maximum operating frequency measurements
C.J. Jiménez-Fernandez, P. Parra-Fernandez, C. Baena-Oliva, M.Valencia-Barrero and F.E. Potestad-Ordoñez
Conference · Congreso de Tecnología, Aprendizaje y Enseñanza de la Electrónica TAEE 2018
abstract
The best way to learn how to design digital systems at the RT level is to use practical examples. In addition, from a teaching point of view, the more practical they are, the more attractive to students. But for a design to be attractive, even if it is presented with a low complexity, it is not possible to do it in a single practice session. This paper presents, as a demonstrator, the design at RT level and its implementation in FPGA of a digital system that uses the Trivium flow cipher and on which measurements of maximum operating frequency are made. This circuit is designed in three laboratory sessions of about two hours each.
Distance measurement as a practical example of FPGA design
C.J. Jiménez-Fernandez, P. Parra-Fernandez, C. Baena-Oliva, M.Valencia-Barrero and F.E. Potestad-Ordoñez
Conference · Congreso de Tecnología, Aprendizaje y Enseñanza de la Electrónica TAEE 2018
abstract
Digital design learning at the RT level requires practical examples and as learning progresses, the examples need to become more complex. FPGAs and development boards offer a very suitable platform for the implementation of these designs. However, classroom practice sessions usually last two hours, which does not allow the complexity of the designs be high enough. For this reason, interesting designs that can be made in several sessions are required In this paper, the construction of a distance measuring system is presented as a demonstrator. For this purpose, a distance measurement module based on ultrasound is available and the results are displayed in 7-segment displays on a Nexys4 board.
Creación de carteles autoexplicativos para laboratorios de electrónica
C.J. Jiménez, C. Baena and M. Valencia
Conference · Congreso de Tecnología, Aprendizaje y Enseñanza de la Electrónica TAEE 2016
abstract
Se presenta un proyecto cuyo objetivo ha sido la creación de carteles que, a modo de tutoriales resumidos, muestran de forma muy visual las tareas básicas a realizar en los laboratorios de electrónica. Están dirigidos a alumnos de asignaturas y titulaciones diversas. Se ha elegido la técnica de carteles por ser un medio muy amigable de refrescar informaciones, permitir contenidos altamente autoexplicativos y tener un coste razonablemente bajo. Se han creado ocho carteles que recogen desde el manejo del instrumental hasta la solución de errores comunes, pasando por la verificación y por la realización adecuada de montajes y medidas.
Aplicaciones docentes del diseño de un picoprocesador
C.J. Jiménez, C. Baena, P. Parra and M. Valencia
Conference · Congreso de Tecnología, Aprendizaje y Enseñanza de la Electrónica TAEE 2016
abstract
El conocimiento de la estructura interna y del mecanismo de funcionamiento de microprocesadores es una parte muy importante en la formación de ingenieros en electrónica e informática. Este conocimiento puede profundizarse con experiencias de diseño de procesadores, que reúnen además muchos aspectos vinculados a otros conocimientos básicos. Sin embargo, debido a su complejidad, el diseño de procesadores comerciales no es efectivo desde un punto de vista docente. En la presente comunicación presentamos una experiencia de diseño en VHDL de un procesador muy sencillo que demuestra los múltiples aprendizajes que suponen para el alumno.
A message transmission system with lightweight encryption as a project in a Master subject
C.J. Jiménez, C. Baena, M. Valencia, J.M. Fernández and A. Moreno
Conference · Congreso de Tecnología, Aprendizaje y Enseñanza de la Electrónica TAEE 2014
abstract
Master subjects should ideally be very practical, to allow students to apply the knowledge they have acquired to the solving of specific problems. This paper proposes the design of a secure communications system using an SPI bus as a Master subject. The system designed uses a stream cipher to encrypt and decrypt data and allows transmission of random length messages. It also uses CRCs to check message integrity.
Books
No results
Book Chapters
Aplicación de técnicas de evaluación continua en grupos numerosos de alumnos
M.C. Baena-Oliva, M.J. Bellido-Díaz, A. Estrada-Pérez, J. Juan-Chico, S. Martín-Guillén, A.J. Molina-Cantero, E. Ostua-Aranguena, M.P. Parra-Fernández, O. Rivera-Romero, M.C. Romero-Ternero, J. Ropero-Rodríguez, P. Ruiz de Clavijo-Vázquez, G. Sánchez-Antón, M. Valencia-Barrero and J.M. Gómez-González
Book Chapter · Experiencia de Innovacion Universitaria (I) Curso 2006-2007, vol. 1, pp 350-365, 2009
abstract
Abstract not available
Other publications
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