Found results matching for:
Author: Ángel Barriga Barros
Year: Since 2002
Journal Papers
Neuro-fuzzy techniques to optimize an FPGA embedded controller for robot navigation
I. Baturone, A. Gersnoviez and Á. Barriga
Journal Paper · Applied Soft Computing, vol. 21, pp 95-106, 2014
abstract
doi pdf
This paper describes how low-cost embedded controllers for robot navigation can be obtained by using a small number of if-then rules (exploiting the connection in cascade of rule bases) that apply Takagi-Sugeno fuzzy inference method and employ fuzzy sets represented by normalized triangular functions. The rules comprise heuristic and fuzzy knowledge together with numerical data obtained from a geometric analysis of the control problem that considers the kinematic and dynamic constraints of the robot. Numerical data allow tuning the fuzzy symbols used in the rules to optimize the controller performance. From the implementation point of view, very few computational and memory resources are required: standard logical, addition, and multiplication operations and a few data that can be represented by integer values. This is illustrated with the design of a controller for the safe navigation of an autonomous car-like robot among possible obstacles toward a goal configuration. Implementation results of an FPGA embedded system based on a general-purpose soft processor confirm that percentage reduction in clock cycles is drastic thanks to applying the proposed neuro-fuzzy techniques. Simulation and experimental results obtained with the robot confirm the efficiency of the controller designed. Design methodology has been supported by the CAD tools of the environment Xfuzzy 3 and by the Embedded System Tools from Xilinx.
Practical Course of Embedded Systems Based on XUPV2P Development Board
A.G. Moya and A.Barriga-Barros
Journal Paper · IEEE Revista Iberoamericana de Tecnologías del Aprendizaje, vol. 8, no. 2, pp 64-70, 2013
abstract
doi
This paper describes a lab course about embedded systems on field-programmable gate array. The proposed practices cover the main features of the design process, which include hardware architecture design, and embedded operating system configuration, adaptation, and implementation.
AMBA bus hardware accelerator IP for Viola-Jones face detection
L. Acasandrei and A. Barriga
Journal Paper · IET Computers and Digital Techniques, vol. 7, no. 5, pp 200-209, 2013
abstract
doi pdf
Face detection is an important aspect for biometrics, video surveillance and human computer interaction. Owing to the complexity of the detection algorithms any biometric system requires a huge amount of computational and memory resources. A direct software-like implementation of any detection algorithm on a low speed, low resource, low power system on chip (SoC) is not feasible. Instead, a software-hardware codesign approach can be used to build hardware accelerators for the most computational consuming parts of the detection algorithms. Therefore the authors propose a compliant advanced microcontroller bus architecture (AMBA) bus hardware IP, a modularised, highly configurable, low power and technology independent core written in an hardware description language (HDL) language. The IP core accelerates Viola-Jones algorithm considered to be one of the most used algorithms for face detection. The hardware accelerator IP is used in an embedded face detection system built around the LEON3 Sparc V8 processor. The authors present the methodology, challenges and performance results for software, hardware and system level design. For the mentioned system the authors have obtained an acceleration factor of 10-12 when using the hardware accelerator in comparison with the software only traditional approach.
Curso Práctico de Sistemas Empotrados Basado en Placas de Desarrollo XUPV2P
A. García-Moya and A. Barriga-Barros
Journal Paper · IEEE Revista Iberoamericana de Tecnologías del Aprendizaje, vol. 7, no. 4, pp 231-237, 2012
abstract
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Abstract not available
Autoregressive time series prediction by means of fuzzy inference systems using non parametric residual variance estimation
F. Montesino-Pouzols, A. Lendasse and A. Barriga-Barros
Journal Paper · Fuzzy Sets and Systems, vol 161, no. 4, pages 471-497, 2010
abstract
doi pdf
We propose an automatic methodology framework for short- and long-term prediction of time series by means of fuzzy inference systems. In this methodology, fuzzy techniques and statistical techniques for nonparametric residual variance estimation are combined in order to build autoregressive predictive models implemented as fuzzy inference systems. Nonparametric residual variance estimation plays a key role in driving the identification and learning procedures. Concrete criteria and procedures within the proposed methodology framework are applied to a number of time series prediction problems. The learn from examples method introduced by Wang and Mendel (W&M) is used for identification. The Levenberg-Marquardt (L-M) optimization method is then applied for tuning. The W&M method produces compact and potentially accurate inference systems when applied after a proper variable selection stage. The L-M method yields the best compromise between accuracy and interpretability of results, among a set of alternatives. Delta test based residual variance estimations are used in order to select the best subset of inputs to the fuzzy inference systems as well as the number of linguistic labels for the inputs. Experiments on a diverse set of time series prediction benchmarks are compared against least-squares support vector machines (LS-SVM), optimally pruned extreme learning machine (OP-ELM), and k-NN based autoregressors. The advantages of the proposed methodology are shown in terms of linguistic interpretability, generalization capability and computational cost. Furthermore, fuzzy models are shown to be consistently more accurate for prediction in the case of time series coming from real-world applications.
Automatic clustering-based identification of autoregressive fuzzy inference
models for time series
F. Montesino-Pouzols and A. Barriga-Barros
Journal Paper · Neurocomputing, vol. 73, no. 10-12, pp 1937-1949, 2010
abstract
doi pdf
We analyze the use of clustering methods for the automatic identification of fuzzy inference models for autoregressive prediction of time series. A methodology that combines fuzzy methods and residual variance estimation techniques is followed. A nonparametric residual variance estimator is used for a priori input and model selection. A simple scheme for initializing the widths of the input membership functions of fuzzy inference systems is proposed for the Improved Clustering for Function Approximation algorithm (ICFA), previously introduced for initializing RBF networks. This extension to the ICFA algorithm is shown to provide the most accurate predictions among a wide set of clustering algorithms. The method is applied to a diverse set of time series benchmarks. Its advantages in terms of accuracy and computational requirements are shown as compared to least-squares support vector machines (LS-SVM), the multilayer perceptron (MLP) and two variants of the extreme learning machine (ELM).
Automatic tuning of complex fuzzy systems with xfuzzy
F.J. Moreno-Velo, I. Baturone, A. Barriga and S. Sánchez-Solano
Journal Paper · Fuzzy Sets and Systems, vol. 158, no. 18, pp 2026-2038, 2007
abstract
doi
Tuning a fuzzy system to meet a given set of requirements is usually a difficult task that involves many parameters. Since doing it manually is often cumbersome, several CAD tools have been reported to automate this process. The tool we have developed, xfsl, tries to reduce the limitations of other tools. In this sense, it includes a wide set of supervised learning algorithms and is able to cope with complex fuzzy systems. In particular, xfsl is able to adjust hierarchical fuzzy systems; systems that employ fuzzy functions defined freely by the user, like membership or connective functions, defuzzification methods, or even linguistic hedges; and fuzzy systems with continuous outputs (such as fuzzy controllers) as well as categorical outputs (such as fuzzy classifiers). Several examples included in this paper illustrate all these issues. Another relevant advantage is that xfsl is integrated into the fuzzy system development environment Xfuzzy 3, and, hence, it can be easily employed within the design flow of a fuzzy system. (c) 2007 Elsevier B.V. All rights reserved.
Modelling and implementation of fuzzy systems based on VHDL
A. Barriga, S. Sánchez-Solano, P. Brox, A. Cabrera and I. Baturone
Journal Paper · International Journal of Approximate Reasoning, vol. 41, no. 2, pp 164-178, 2006
abstract
doi pdf
The number of electronic applications using fuzzy logic-based solutions hits increased considerably in the last few years. Concurrently, new CAD tools that explore different implementation technologies for this type of systems have been developed. In this paper we illustrate a fuzzy logic system design strategy based on a high level description. Employing this high level description, the knowledge base is translated to a format in appearance close to the natural language with the particularity that it uses a hardware description language (VHDL) directly synthesizable on an FPGA circuit.]it addition, we analyze different approaches for FPGA implementations of fuzzy systems in order to characterize them in terms of area and speed. Among them, the use of specific processing architectures implemented oil FPGAs presents as main advantages a good "cost-performance" ratio and an acceptably short development time. The different synthesis facilities provided by the Xfuzzy design environment for the implementation of programmable fuzzy systems, which take advantage of the available resources in the current FPGA families, are also analyzed in this paper. (C) 2005 Elsevier Inc. All rights reserved.
Medida y estimación activa de las prestaciones de la red
F. Montesino and A. Barriga
Journal Paper · Boletín de la Red Nacional de I+D RedIRIS, no. 74-75, pp 28-31, 2005
abstract
Los sistemas de medida y estimación activa de prestaciones de redes se basan en la medida de la respuesta de la red frente a tráfico de prueba transmitido entre nodos de extremo a extremo. En esta ponencia presentamos un entorno integrado de medida y estimación activa de prestaciones. El entorno generaliza, unifica y amplía el conjunto de técnicas de medida y estimación activa disponible hasta la fecha, ofreciendo una interfaz de usuario unificada, una de programación común y librerías que implementan de manera autónoma los diferentes componentes de un sistema de medida y estimación activa genérico. Se resumen asimismo las mejoras aportadas por el entorno desarrollado y su posibilidades de ampliación futura.
Hardware/software codesign of configurable fuzzy control systems
A. Cabrera, S. Sánchez-Solano, P. Brox, A. Barriga and R. Senhadji
Journal Paper · Applied Soft Computing, vol. 4, no. 3, pp 271-285, 2004
abstract
doi pdf
Fuzzy inference techniques are an attractive and well-established approach for solving control problems. This is mainly due to their inherent ability to obtain robust, low-cost controllers from the intuitive ( and usually ambiguous or incomplete) linguistic rules used by human operators when describing the control process. This paper focuses on the hardware/software codesign of configurable fuzzy control systems. Two prototype systems implemented on general-purpose development boards are presented. In both of them, hardware components are based on specific and configurable fuzzy inference architecture whereas software tasks are supported by a microcontroller. The first prototype uses an off-the-shelf microcontroller and a low-complexity Xilinx XC4005XL field programmable gate array (FPGA). The second one is implemented as a system on programmable chip (SoPC), integrating the microcontroller together with the fuzzy hardware architecture and its interface circuits into a Xilinx Spartan2E200 FPGA. (C) 2004 Elsevier B.V. All rights reserved.
Arquitectura eficiente para la implementación hardware de sistemas de inferencia difusos
A. Cabrera, S. Sánchez-Solano, C.J. Jimémez, A. Barriga and I. Baturone
Journal Paper · Ingeniería Electrónica, Automática y Comunicaciones, vol. XXIII, no. 1, pp. 59-66, 2003
abstract
Se describen los elementos integrantes de una arquitectura de bajo costo y alto desempeño para la implementación hardware de sistemas de inferencia difusos, la cual se basa en el procesado de reglas activas, la limitación del grado de solapamiento de las funciones de pertenencia de las entradas y la utilización de métodos de defusificación simplificados. También se expone el entorno de desarrollo de sistemas difusos Xfuzzy, con énfasis en la herramienta XFVHDL, la cual permite la generación de código VHDL para los diferentes elementos de la arquitectura descrita.
Conferences
Full Open-Source Implementation of an Academic RISC-V on FPGA
P. Navarro-Torrero, M.C. Martínez-Rodríguez, A. Barriga-Barros and P. Brox
Conference · 2024 XVI Congreso de Tecnología, Aprendizaje y Enseñanza de la Electrónica (TAEE)
abstract
doi
In alignment with the ethos of openness and democracy inherent in the RISC-V architecture, our research endeavors have been directed towards the utilization of open-source tools for the implementation of a simple but didactic RISC-V processor denoted as ASTIRV32I. The paper discusses the design strategies, memory mapping, physical verification procedures, and performance evaluation of the ASTIRV32I processor. Furthermore, it highlights the successful validation of the implemented design through the execution of fundamental algorithms, exemplifying the practicality and viability of the RISC-V-based processor design and serving as a proof-of-concept for open-source FPGA design.
Digital Design Flow Based on Open Tools for Programmable Logic Devices
P. Navarro-Torrero, L.F. Rojas-Muñoz, M.C. Martínez-Rodríguez, A. Barriga-Barros, C.J. Jiménez-Fernández, M. Brox and P. Brox
Conference · 2024 XVI Congreso de Tecnología, Aprendizaje y Enseñanza de la Electrónica (TAEE)
abstract
doi
In this demonstrator, a design flow based on a set of open-source tools is showcased, enabling the simulation, synthesis, implementation, and programming of digital systems on programmable logic devices. Three academic examples, increasing in complexity, are shown running on open hardware development boards to demonstrate the validity of the digital design flow based on the APIO environment.
RISC-V processors design: a methodology for cores development
A. Barriga
Conference · Conference on Design of Circuits and Integrated Systems DCIS 2020
abstract
This communication describes a design methodology that facilitates the implementation of processors based on the ISA of RISC-V. As an example of application of the proposed methodology, the design of three processors with different architectures and features is described.
Visiting Open Source Hardware: A Survey of Opportunities
A. Barriga
Conference · International Conference on Scientific Computing CSC 2017
abstract
This paper targets a review of the "state of the art" of various aspects of open source hardware. Pertinent concepts and their definitions are reviewed for this purpose. A description is made of various licenses under which open source products are offered. Resources and initiatives for both hardware and open source design tools are briefly described. Finally a debate is made on the business models that rely on this concept.
SHORES: Software and Hardware Open Repository for Embedded Systems
L. Acasandrei and A. Barriga
Conference · World Congress on Engineering and Computer Science WCECS 2017
abstract
This communication describes an open source repository for embedded software and hardware designs. Its main goal is to make available to everyone, in an open-source
style, the designs and results from academia/research community. SHORES hosts the source code of various software and hardware design projects, that combined with the newest
algorithms proposed by academia, give birth to embedded solutions to the most challenging obstacles in the fields of vision, bio-cryptography, signal processing, etc. SHORES resources are distribute under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the license, or any later version.
Experiencia de puesta en marcha y desarrollo de un Máster on-line en Microelectrónica
A.J. Acosta, A. Barriga, B. Pérez and J.L. Huertas
Conference · Congreso de Tecnología, Aprendizaje y Enseñanza de la Electrónica TAEE 2016
abstract
Desde octubre de 2008 la Universidad de Sevilla oferta el título oficial de ‘Máster Universitario en Microelectrónica, Diseño y Aplicaciones de Sistemas Micro/nanométricos’. Dicho máster tiene, como característica diferenciadora respecto a la práctica totalidad de cursos similares existentes, la peculiaridad de ser impartido on-line. En su momento de aparición fue una auténtica novedad, que supuso un extraordinario reto, tanto en su puesta en marcha como en su desarrollo día a día, ya que aúna las características y problemática de realizar a la vez docencia a distancia y de contenido técnico muy especializado. Esta comunicación describe las características y la experiencia de puesta en marcha y desarrollo de un título exitoso en esta área.
Experiencia en desarrollo de sistemas empotrados hardware-software como Trabajo Fin de Grado
J.M. Calahorro, L. Acasandrei, A. Barriga and M.J. Avedillo
Conference · Congreso de Tecnología, Aprendizaje y Enseñanza de la Electrónica TAEE 2016
abstract
Se presenta en esta comunicación el desarrollo de un Trabajo Fin de Grado (TFG) de la Titulación de Ingeniería Informática-Ingeniería de Computadores. El objetivo es mostrar la experiencia en el desarrollo de un TFG que aúne aspectos multidisciplinares, que permitan desarrollar en el alumno las capacidades adquiridas durante el proceso educativo en el Grado en Ingeniería de Computadores. En concreto se plantea la especificación de un sistema empotrado hardware-software dentro del campo de aplicación del reconocimiento de caras en imágenes y/o video, competitivo en términos de velocidad respecto a una implementación puramente software.
Hardware-Software Embedded Face Recognition System
M.J. Avedillo, A. Barriga, L. Acasandrei and J.M. Calahorro
Conference · International Conferences in Central Europe on Computer Graphics, Visualization and Computer Vision WSCG 2016
abstract
This paper describes the design and implementation of a hardware-software embedded system for face recognition applications in images and/or videos. The system has hardware components to speed up the face detection and recognition stages. It is a system suitable for applications requiring real-time, due that the response times are deterministic and bounded. The system is based on a previous implementation that had accelerated the image capturing process, and the face detection. This paper will focuses in the face recognition acceleration.
Repositorio de componentes hardware y software de código abierto para sistemas empotrados
L. Acasandrei and A. Barriga
Conference · Jornadas de Computación Reconfigurable y Aplicaciones JCRA 2015
abstract
En este trabajo se describe un repositorio de diseños hardware y software empotrados de código abierto. El objetivo principal del repositorio es poner a disposición del público, en un estilo de código abierto, diseños y resultados de la comunidad académica/investigadora. SHORES (Software and Hardware Open Repository for Embedded Systems) aloja el código fuente de varios proyectos software y de diseño hardware que permiten dar soluciones empotradas a algunos problemas complejos en los campos de visión, bio-criptografía, procesamiento de señal, etc. Los recursos de SHORES están distribuidos bajo los términos de GNU General Public License, publicada por la Fundación para el Software Libre; ya sea la versión 2 de la licencia, o cualquier versión posterior.
Open Library of IP Module Interfaces for AMBA Bus
L. Acasandrei and A. Barriga
Conference · World Congress on Engineering WCE 2015
abstract
This paper describes the design of Intellectual Property (IP) modules of the most widely used communication standard interfaces, the AMBA bus. There is described the design of masters and slaves interface modules for APB, AHB, AXI and AXI-Stream buses. The IP modules presented can be used in systems with a variety of design constraints (low speed to high speed applications, low power consumption, etc). For the slave APB bus interfaces and the master/slave AHB a development environment for design and simulation based on the GRLIB library is provided.
Embedded Face Detection Application based on Local Binary Patterns
L. Acasandrei and A. Barriga
Conference · IEEE International Conference on Embedded Software and Systems ICESS 2014
abstract
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In computer vision during the recent years a new paradigm for object detection has stimulated researchers and designers interest. The foundation of this new paradigm is the Local Binary Pattern (LBP) which is a nonparametric operator that efficiently extracts the features of local structures in images. This communication describes a software embedded implementation of LBP based algorithm for object detection, in particular targeting frontal face detection.
Diseño de una librería de módulos IP de interfaces con el bus AMBA
L. Acasandrei and A. Barriga
Conference · Jornadas de Computación Reconfigurable y Aplicaciones JCRA 2014
abstract
Esta comunicación describe el diseño de módulos IP (Intellectual Property) de la interfaz estándar de comunicación más utilizada, el bus AMBA. Se plantea el diseño de interfaces de módulos maestros y esclavos, para los buses APB, AHB, AXI y AXI-Stream. Los módulos IP que se presentan pueden emplearse en sistemas con una gran variedad limitaciones de diseño (baja velocidad hasta aplicaciones de alta velocidad de transmisión, bajo consumo de potencia, etc). Para las interfaces de bus APB esclavo y bus AHB maestro/esclavo se proporciona un entorno de desarrollo para el diseño y simulación basado en la librería GRLIB.
Hardware-Software Face Detection System based on Multi Block Local Binary Patterns
L. Acasandrei and A. Barriga
Conference · International Conference on Image, Vision and Computing ICIVC 2014
abstract
Face detection is an important aspect for biometrics, video surveillance and human computer interaction. Due to the complexity of the detection algorithms any face detection system requires a huge amount of computational and memory resources. In this communication an accelerated implementation of MB LBP face detection algorithm targeting low frequency, low memory and low power embedded system is presented. The resulted implementation is time deterministic and uses a customizable AMBA IP hardware accelerator. The IP implements the kernel operations of the MB-LBP algorithm and can be used as universal accelerator for MB LBP based applications. The IP employs 8 parallel MB-LBP feature evaluators cores, uses a deterministic bandwidth, has a low area profile and the power consumption is ~95 mW on a Virtex5 XC5VLX50T. The resulted implementation acceleration gain is between 5 to 8 times, while the hardware MB-LBP feature evaluation gain is between 69 and 139 times.
Face Identification Implementation in a Standalone Embedded System
L. Acasandrei, A. Barriga, M. Quintero and A. Ruiz
Conference · IEEE International Symposium on Industrial Electronics ISIE 2014
abstract
In this paper is described an embedded system for face identification. The system, running on FPGA, is built around LEON3 processor and consists of several IP Intellectual Property) modules designed as AMBA bus peripherals. The face detection is accelerated with the help of a hardware module while the face recognition is entirely executed in software. The face detection hardware accelerator module is reconfigurable and can share its internal resources (memory, multiplier, integer square root unit) with the LEON3 processor. The system has been designed on the criteria of resources optimization, low power consumption and improved operation speed.
Design Methodology for Face Detection Acceleration
L. Acasandrei and A. Barriga
Conference · IEEE Industrial Electronics Conference IECON 2013
abstract
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A design methodology to accelerate the face detection for embedded systems is described, starting from high level (algorithm optimization) and ending with low level (software and hardware codesign) by addressing the issues and the design decisions made at each level based on the performance measurements and system limitations. The implemented embedded face detection system consumes very little power compared with the traditional PC software implementations while maintaining the same detection accuracy. The proposed face detection acceleration methodology is suitable for real time applications.
Sistema empotrado reconfigurable para aplicaciones de identificación de caras
L. Acasandrei, M. Quintero-Rodríguez, A. Ruiz-Ribes and A. Barriga-Barros
Conference · Jornadas de Computación Reconfigurable y Aplicaciones JCRA 2013
abstract
Se presenta un sistema empotrado sobre FPGA para detección/reconocimiento de caras basado en el procesador LEON3. El sistema está constituido por varios módulos IP (Intelectual Property) diseñados como periféricos del bus AMBA. El módulo de detección de caras es reconfigurable pudiendo operar en un modo de detección de caras o bien en un modo en el que sus recursos (memoria y operadores aritméticos) son utilizados por el procesador como componentes genéricos. El sistema ha sido diseñado aplicando criterios de optimización de consumo de potencia y velocidad de operación.
Embedded Face Detection Implementation
L. Acasandrei and A. Barriga
Conference · International Conference of the Biometrics Special Interest Group BIOSIG 2013
abstract
In this communication an embedded implementation of the Viola-Jones face detection algorithm targeting low frequency, low memory, and low power consumption, is presented. The design methodology, performance analysis and algorithm optimization in order to accelerate the face detection process, will be described.
Prácticas de laboratorio de Linux empotrado sobre placas de desarrollo XUPV2P
A. García-Moya and A. Barriga-Barros
Conference · Congreso de Tecnología, Aprendizaje y Enseñanza de la Electrónica TAEE 2012
abstract
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This communication describes a lab course about embedded systems on FPGA. The proposed practices cover the main features of the design process, which includes the hardware architecture design, and the embedded operating system configuration, adaptation and implementation.
Implementación sobre FPGA de un sistema de detección de caras basado en LEON3
L. Acasandrei and A. Barriga-Barrios
Conference · Iberchip XVIII Workshop IWS 2012
abstract
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En esta comunicación se presenta un sistema empotrado de detección de caras sobre FPGA. Con objeto de disponer de aceleración en el proceso de detección de caras se propone un sistema basado en técnicas de codiseño hardware/software. Se detalla el mecanismo de aceleración en la detección de caras. También se describe la implementación de un módulo IP que permite la aceleración hardware así como los resultados obtenidos.
FPGA implementation of an embedded face detection system based on LEON3
L. Acasandrei and A. Barriga-Barrios
Conference · International Conference on Image Processing, Computer Vision & Pattern Recognition IPCV 2012
abstract
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In this paper we present an FPGA face detection embedded system. In order achieve acceleration in the face detection process a hardware-software codesign technique is proposed. The paper describes the face detection acceleration mechanism. It also describes the implementation of an IP module that allows hardware acceleration.
XFSML: An XML-based modeling language for fuzzy systems
F.J. Moreno-Velo, A. Barriga, S. Sánchez-Solano and I. Baturone
Conference · IEEE International Conference on Fuzzy Systems FUZZ-IEEE 2012
abstract
This paper presents a new modeling language for fuzzy systems called XFSML. It is an XML-based language and it is proposed as a starting point for the definition of a standard modeling language in the fuzzy community. The main features of the language are its high expressiveness and its independence from specific platforms, tools or programming languages.
Sistema empotrado de reconocimiento de voz sobre FPGA
J. Balosa, F.J. Crespo and A. Barriga
Conference · Iberchip XVIII Workshop IWS 2012
abstract
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En esta comunicación se presenta un sistema empotrado sobre FPGA de reconocimiento de voz que aplica el algoritmo LPC (Linear Predictive Coding). El sistema está basado en el procesador MicroBlaze de Xilinx. Se describe el desarrollo del sistema desde la implementación del controlador del códec de audio (tanto el hardware como el desarrollo de los drivers) hasta la adaptación del algoritmo LPC a los requerimientos de la arquitectura hardware.
Power-efficient focal-plane image representation for extraction of enriched Viola-Jones features
J. Fernández-Berni, L. Acasandrei, R. Carmona-Galán, A. Barriga-Barrios and A. Rodríguez-Vázquez
Conference · IEEE International Symposium on Circuits and Systems ISCAS 2012
abstract
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This paper describes the use of a reconfigurable focal-plane processing array in order to achieve an image representation which dramatically reduces the computational load of the Viola-Jones object detection framework. Additionally, such representation provides richer information than the simple sum of pixels within rectangular regions originally defined in this framework. As a result, more elaborated features could be devised to speed up the execution of the subsequent attentional cascade, boosting thus the performance of the whole algorithm. The proposed circuitry has been successfully implemented in a CMOS prototype smart imager. Experimental results are given, demonstrating the suitability of the approach presented to efficiently deliver enriched Viola-Jones features.
Accelerating Viola-Jones face detection for embedded and SoC environments
L. Acasandrei and A. Barriga
Conference · International Conference on Distributed Smart Cameras ICDSC 2011
abstract
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In this communication a speed optimized implementation of Viola-Jones Face Detection Algorithm based on the baseline OpenCV face detection application is presented. The baseline OpenCV face detection application is analyzed. Then the necessary modifications and improvements are described in order to accelerate the execution speed in an embedded or SoC (System-on-Chip) environments. © 2011 IEEE.
Metodología para el diseño multilenguaje de sistemas de control empotrados sobre FPGAs
E. del Toro, S. Sánchez-Solano, A. Cabrera and A. Barriga
Conference · Jornadas de Computación Reconfigurable y Aplicaciones JCRA 2010
abstract
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Abstract not avaliable
Identifiying fuzzy inference models by means of possibilistic clustering: socio-economic applications
A. Guillén, F. Montesino, A. Barriga, L.J. Herrera, J. González, H. Pomares and I. Rojas
Conference · Modelling and Learning in Social and Human Sciences MASHS 2010
abstract
Abstract not avaliable
Aplicación de lógica difusa en el control de contraste de imágenes
N.M. Hussein-Hassans and A. Barriga
Conference · XV Congreso Español sobre Tecnologías y Lógica Fuzzy ESTYLF 2010
abstract
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En esta comunicación se aplican los operadoresdel álgebra de Lukasiewicz para modificar el contraste de imágenes. El control del contraste se realiza mediante mecanismos de inferencia basados en lógica difusa. De esta manera el sistema de control de contraste que se obtiene presenta características que hacen que sea muy adecuado para su implementación hardware ya que da lugar a circuitos de bajo coste y alta velocidad de procesado.
A design environment for synthesis of embedded fuzzy controllers on FPGAs
S. Sánchez-Solano, E. del Toro, M. Brox, I. Baturone and A. Barriga
Conference · IEEE World Congress on Computational Intelligence WCCI 2010
abstract
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This paper presents a design environment for the synthesis of embedded fuzzy controllers on FPGAs. It provides a novel implementation technique that allows accelerating the exploration of the design space of fuzzy control modules, as well as a codesign flow that eases their integration into complex control systems and the joint development of hardware and software components. The set of CAD tools supporting this environment includes specific fuzzy logic design tools provided by Xfuzzy, FPGA synthesis and implementation tools from Xilinx, and modeling and simulation facilities from Matlab. As demonstrated by the analyzed design examples, the described development strategy takes advantage of flexibility and ease of configuration offered by the different tools to dramatically speed up the stages of description, synthesis, and functional verification of embedded fuzzy control systems.
Image constrast control based on Lukasiewicz's operators and Fuzzy Logic
N.M.H. Hassan and A. Barriga
Conference · International Conference on Intelligent Systems Design and Applications ISDA 2009
abstract
This paper describes a technique to control the contrast in images based on the application of Lukasiewicz algebra operators. In particular, the technique is based on the bounded-sum and the bounded-product. An interesting feature when applying these operators is that it allows low cost hardware realizations (in terms of resources) and high processing speed. The selection of the control parameters is perform by a fuzzy systems.
Implementación sobre FPGA de una técnica de control de contraste de imágenes basada en operadores de Lukasiewicz
N.M. Hussein and A. Barriga
Conference · Jornadas de Computacion Reconfigurable y Aplicaciones JCRA 2009
abstract
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En esta comunicación se describe una técnica para controlar el contraste en imágenes basadas en la aplicación de operadores del álgebra Lukasiewicz y su implementación hardware sobre FPGA. En particular, la técnica se basa en los operadores suma-acotada y producto-acotado. Una característica interesante en la aplicación de estos operadores es que permite realizaciones hardware de bajo coste (en términos de recursos) y de alta velocidad de procesado.
Image constrast control based on Lukasiewicz's operators
N.M.H. Hassan and A. Barriga
Conference · IEEE International Symposium on Intelligent Signal Processing WISP2009
abstract
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This paper describes a technique to control the contrast in images based on the application of Lukasiewicz algebra operators. In particular, the technique is based on the bounded-sum and the bounded-product. An interesting feature when applying these operators is that it allows low cost hardware realizations (in terms of resources) and high processing speed.
Regressive Fuzzy Inference Models with Clustering Identification: Application to the ESTSP'08 Competition
F. Montesino and A. Barriga
Conference · European Symposium on Time Series Prediction ESTSP 2008
abstract
In the context of a previously proposed methodology frame- work for time series prediction, we use a clustering technique in order to identify fuzzy inference systems for the regressive modeling of time series. We propose a modified version of the method for the identification of fuzzy rules based on the subtractive clustering method proposed by Chiu. The proper number of rules is derived from an a priori nonparametric residual variance estimate that is also used for an initial input selection stage. In addition, systems are optimized through the Levenberg-Marquardt second order method. The proposed method is applied to the three datasets of the ESTSP'08 competition and the results are discussed.
Design and Implementation of an Edge Detection Circuit Based on Soft Computing
A. Barriga and N.M. Hussein-Hassan
Conference · International Conference on Industrial Informatics and Systems Engineering IISE 2008
abstract
Abstract not available
XfuzzyLib: una librería de módulos para la síntesis hardware de sistemas de inferencia difusos
S. Sánchez-Solano, M. Brox, I. Baturone and A. Barriga
Conference · XIV Congreso Español sobre Tecnologías y Lógica Fuzzy ESTYLF 2008
abstract
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Esta comunicación presenta una nueva técnica de implementación de sistemas difusos que está basada en el uso de una librería de módulos específicos, denominada XfuzzyLib, y cuyo flujo de diseño combina las herramientas de modelado y simulación del entorno Matlab con las de síntesis e implementación de FPGAs de Xilinx. La estrategia propuesta, que constituye la base de una nueva herramienta de síntesis hardware del entorno Xfuzzy, aprovecha las ventajas de flexibilidad y facilidad de configuración que brindan las diferentes herramientas de Matlab y Xilinx, permitiendo acelerar considerablemente las etapas de descripción, síntesis y verificación funcional de los sistemas bajo desarrollo.
Síntesis hardware de módulos de inferencia difusos mediante herramientas de diseño de DSP
M. Brox, S. Sánchez-Solano, P. Brox, I. Baturone, A. Barriga and A. Gersnoviez
Conference · VIII Congreso de Tecnologías Aplicadas a la Enseñanza de la Electrónica TAEE 2008
abstract
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En esta comunicación se describe una nueva estrategia de desarrollo de sistemas de control basados en lógica difusa mediante un flujo de diseño que combina las herramientas de modelado y simulación del entorno Matlab y las herramientas de síntesis e implementación de FPGAs de Xilinx. Apoyada en el uso de una librería de módulos específicos para sistemas difusos, esta estrategia acelera las etapas de descripción, síntesis y verificación funcional de los sistemas bajo desarrollo.
Xftsp: A tool for time series prediction by means of fuzzy inference systems
F. Montesino, A. Lendasse and A. Barriga
Conference · International IEEE Conference on Intelligent Systems IS 2008
abstract
A new software tool for time series prediction by means of fuzzy inference systems is reported. This tool, named xftsp, implements a novel methodology for time series prediction based on methods for automatic fuzzy systems identification and supervised learning combined with statistical methods for nonparametric residual variance estimation. xftsp is designed as a tool integrated in the Xfuzzy development environment for fuzzy systems. Experiments carried out on a number of time series benchmarks show the advantages of xftsp in terms of both accuracy and computational requirements as compared against Least-Squared Support Vector Machines, an established technique in the field of time series prediction. © 2008 IEEE.
Hardware implementation of a soft computing technique for edge detection
N.M. Hussein and A. Barriga
Conference · International Conference of Signal and Image Engineering ICSIE 2008
abstract
A technique for edge detection in images and its hardware implementation is presented in this communication. The presented technique applies soft computing strategies for each of the stages of the edge detection process. Fuzzy logic and Lukasiewicz's algebra operator are applied in the above mentioned stages. The hardware implementation of the system takes as design criterion the low cost and a high processing speed.
A fuzzy thresholding circuit for image segmentation
A. Barriga and N.M. Hussein
Conference · International Conference on Knowledge-Based Intelligent Information and Engineering Systems KES 2008
abstract
The paper describes a technique for image segmentation based oil binary thresholding and the hardware implementation of the segmentation circuit. The technique applies a fuzzy logic strategy to calculate the threshold. The hardware design methodology is based on a high level behavioral description of the fuzzy system. The knowledge base is described using the standard hardware description language VHDL. The hardware design criteRíon is the low cost and, in special way, a high processing speed.
Fuzzy inference based autoregressors for time series prediction using nonparametric residual variance estimation
F.M. Pouzols, A. Lendasse and A. Barriga
Conference · IEEE International Conference on Fuzzy Systems FUZZ-IEEE 2008
abstract
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We apply fuzzy techniques for system identification and supervised learning in order to develop fuzzy inference based autoregressors for time series prediction. An automatic methodology framework that combines fuzzy techniques and statistical techniques for nonparametric residual variance estimation is proposed. Identification is performed through the learn from examples method introduced by Wang and Mendel, while the Marquard-Levenberg supervised learning algorithm is then applied for tuning. Delta test residual noise estimation is used in order to select the best subset of inputs as well as the number of linguistic labels for the inputs. Experimental results for three time series prediction benchmarks are compared against LS-SVM based autoregressors and show the advantages of the proposed methodology in terms of approximation accuracy, generalization capability and linguistic interpretability. © 2008 IEEE.
Linguistic summarization of network traffic flows
F.M. Pouzols, A. Barriga, D.R. López and S. Sánchez-Solano
Conference · IEEE International Conference on Fuzzy Systems FUZZ-IEEE 2008
abstract
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We address, by means of fuzzy linguistic summaries, two related problems: summarizing network flow statistics and making these statistics human-readable. Two complementary summarization methods are developed. First, a fixed set of protoforms of interest is defined, and the ones with a higher truth value are shown to the user as simple on-line summaries. This first method is suitable for real-time monitoring. Then, an association rules mining process is carried out in order to find hidden relations in flow records. Both approaches are implemented in a tool capable of real-time and off-line processing of network flow records. Experimental results for a number of heterogeneous NetFlow records show the usefulness of linguistic summaries to both network practitioners and users. © 2008 IEEE.
Image Compression based on Fuzzy Logic and its Hardware Implementation
A. Barriga and N.M. Hussein-Hassan
Conference · International Symposium on Innovations in Intelligent System and Applications INISTA 2007
abstract
Abstract not available
Development environment using FPGA for domotics applications based on X10 technology
M.D. Cruz, J.A. Ortega, A. Barriga and A. Fernández-Montes
Conference · International Joint Conferences on Computer, Information, and Systems Sciences, and Engineering CISSE 2007
abstract
This communication proposes a basic software and hardware architecture of a controller for the X10 technology interface CM11A, oriented to the world of home automation. The implementation of the system is based in the use of programmable devices such as FPGA (Field Programmable Gate Array). With this controller an end user will be able to control and to manage a set of devices distributed in a domotics space.
Open FPGA-Based Development Platform for Fuzzy Systems with Applications to Communications
F. Montesino, A. Barriga, D.R. López and S. Sánchez-Solano
Conference · XXII Conference on Design of Circuits and Integrated Systems DCIS 2007
abstract
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Soft computing techniques are gaining momentum as tools for network traffic modeling, analysis and control. Efficient hardware implementations of these techniques that can achieve real-time operation in high-speed communications equipment is however an open problem. This paper describes a platform for the development of fuzzy systems with applications to communications systems, namely network traffic analysis and control. An FPGA development board with PCI interface is employed to support an open platform that comprises open CAD tools as well as IP cores. For the development process, we set up a methodology and a CAD tools chain that cover from initial specification in a high-level language to implementation on FPGA devices. PCI compatible fuzzy inference modules are implemented as SoPC based on the open WISHBONE interconnection architecture. We outline results from the design and implementation of fuzzy analyzers and regulators for network traffic. These systems are shown to satisfy operational and architectural requirements of current and future high-performance routing equipment.
Using xfuzzy environment for the whole design of fuzzy systems
I. Baturone, F.J. Moreno-Velo, S. Sánchez-Solano, A. Barriga, P. Brox, A.A. Gersnoviez and M. Brox
Conference · IEEE International Conference on Fuzzy Systems FUZZ-IEEE 2007
abstract
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Since 1992, Xfuzzy environment has been improving to ease the design of fuzzy systems. The current version, Xfuzzy 3, which is entirely programmed in Java, includes a wide set of new featured tools that allow automating the whole design process of a fuzzy logic based system: from its description (in the XFL3 language) to its synthesis in C, C++ or Java (to be included in software projects) or in VHDL (for hardware projects). The new features of the current version have been exploited in different application areas such as autonomous robot navigation and image processing.
Implementación de un circuito para compresión de imágenes aplicando lógica difusa
A. Barriga and N.M. Hussein-Hassan
Conference · Iberchip XIII Workshop IWS 2006
abstract
Presentamos en esta comunicación un circuito que realiza la compresión de imágenes aplicando una estrategia basada en el uso de lógica difusa. El circuito ha sido implementado sobre FPGA. El grado de compresión es programable ya que se puede seleccionar diferentes niveles de compresión en función de la calidad de imagen requerida. El sistema realiza tres niveles de compresión de imágenes. Así se dispone de la realización de un mecanismo de compresión sin pérdidas y dos técnicas de compresión con pérdidas.
New features of the fuzzy logic development environment Xfuzzy
A. Barriga, S. Sánchez-Solano, I. Baturone, D.R. López, F.J. Moreno-Velo, F. Montesino, P. Brox and N.M. Hussein
Conference · Information Processing and Management of Uncertainty in Knowledge-Based Systems IPMU 2006
abstract
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The characteristics of the new version of the fuzzy systems development environment Xfuzzy is presented. The environment covers the aspects related to the specification, verification, adjustment and implementation of fuzzy systems. It is an open environment (in the sense that the user can define many functional and structural aspects) and a free distribution tool that allows proving new formalisms and helps the definition and implementation of complex systems.
Intelligent Scheduling of Aggregate Traffic in Internet Routers by Means of Fuzzy Systems
F. Montesino Pouzol, D.R. López, A. Barriga and S. Sánchez-Solano
Conference · Information Processing and Management of Uncertainty in Knowledge-Based Systems IPMU 2006
abstract
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A major research problem in Internet transport and network layers is the development of traffic regulation mechanisms that can cope with the requirements of a growing diversity of technologies, applications and services. This paper presents novel mechanisms for intelligent traffic scheduling in Internet routers by means of fuzzy logic based systems. A systematic design methodology, interpretability principles, evaluation over a broad range of network scenarios as well as practical implementation constraints have been considered. A comparative evaluation of results obtained by means of our fuzzy controllers as compared to that of traditional approaches is outlined.
Image Enlargement using the Fuzzy-ELA Algorithm
P. Brox, I. Baturone, S. Sánchez-Solano and A. Barriga
Conference · Information Processing and Management of Uncertainty in Knowledge-Based Systems IPMU 2006
abstract
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The increase of resolution is one of the most important tasks in image processing. Traditional interpolation algorithms perform a linear interpolation between the closest pixels in the image. This strategy may introduce mistakes specially in the reconstruction of edges and zones with high contrast luminance values. The use of a novel interpolation algorithm for image enlargement is presented in this paper. It employs a fuzzy logic-system to adapt the interpolation to the presence of edges in the image, achieving good results at expense of a low increment in the computational cost.
FPGA Based Implementation of Fuzzy Controllers for Internet Traffic
F. Montesino, A. Barriga, D.R. López and S. Sánchez-Solano
Conference · Iberchip XII Workshop IWS 2006
abstract
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Recent research results propose and show the usefulness of a fuzzy control based approach to the development of intelligent systems for congestion control in Internet routers. However, adoption of this new technology is handicapped because of operational requirements, mostly in terms of inference speed, a hard constrain on the practical implementation of key traffic controlling systems. We report on the implementation of intelligent fuzzy controllers for Internet traffic using an FPGA based prototyping platform. A development methodology and a tool chain, a flexible and open prototyping platform, a set of fuzzy controllers and implementation results for a number of traffic controllers are presented. Our prototypes are shown to satisfy the requirements of high performance routing hardware deployed in the current Internet.
Control difuso de la tasa de transferencia de extremo a extremo en protocolos de transporte de Internet
F. Montesino, D.R. López, A. Barriga and S. Sánchez-Solano
Conference · XIII Congreso Español de Tecnologías y Lógica Fuzzy ESTYLF 2006
abstract
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La dinámica del tráfico de extremo a extremo en Internet es un problema complejo para el cual los modelos disponibles son, en el mejor de los casos incompletos. Esta comunicación describe nuevos mecanismos para regulación de la tasa de transferencia de extremo a extremo en la capa de transporte por medio de sistemas difusos. Se describen una generalización basada en lógica difusa de los mecanismos de control de flujo y congestión de TCP (Transport Control Protocol), el diseño de un regulador difuso basado en mecanismo de ventana para TCP, así como la metodología de diseño empleada para simular e implementar de manera experimental el sistema. Se resume un estudio comparativo del regulador difuso presentado frente a los mecanismos tradicionales. El regulador difuso resulta útil como enfoque de modelado y proporciona significativas mejoras de prestaciones respecto a un conjunto de criterios.
Fuzzy end-to-end rate control for Internet transport protocols
F. Montesino, D.R. López, A. Barriga and S. Sánchez-Solano
Conference · IEEE International Conference on Fuzzy Systems FUZZ-IEEE 2006
abstract
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End-to-end Internet packet dynamics is a complex problem for which models available to date are at best incomplete. A major research problem in Internet transport layer protocols is the development of rate control mechanisms that can cope with the requirements of a growing diversity of technologies, applications and services. This paper describes novel mechanisms for intelligent end-to-end traffic rate control in Internet by means of fuzzy systems. We first outline a fuzzy logic based generalization of TCP (Transport Control Protocol) rate control principles. The design of a fuzzy TCP-like window-based rate controller is then described. A systematic fuzzy systems design methodology is used in order to simulate and implement the system as an experimental tool. A comparative evaluation of simulation and implementation results from the fuzzy rate controller as compared to that of traditional controllers is outlined. Besides being a useful modelling approach, the fuzzy rule based rate controller is shown to outperform other approaches with regards to a number of criteria.
Lineal image compression based on Lukasiewicz's operators
N.M.H. Hassan and A. Barriga
Conference · International Conference on Knowledge-Based and Intelligent Information and Engineering Systems KES 2006
abstract
We proposed the use of Lukasiewicz's operators for lineal image compression. These operators have been applied to the approximation of piecewise linear functions. In this sense we showed two basic piecewise lineal static image compression techniques in which the use of this operators lets to reduce hardware resources.
Piecewise Linear Function Interpolation Using Lukasiewicz's Operators
N.M. Hussein-Hassan, A. Barriga and S. Sánchez-Solano
Conference · Int. Symposium on Innovations in Intelligent System and Applications INISTA 2005
abstract
Abstract not available
Fuzzy logic activities at the Microelectronics Institute of Seville
A. Barriga, S. Sánchez-Solano, I. Baturone, F. Moreno-Velo, P. Brox, F. Montesino, N.M. Hussein, M. Brox and A. Gersnoviez
Conference · XVI Italian Workshop on Neural Nets WIRN 2005
abstract
In this communication we present the activities related to the development of fuzzy logic based systems at the Microelectronics Institute of Seville (Spain). These activities regard with the design of circuits and systems that operate in fuzzy logic, the development of CAD tools for fuzzy logic and the accomplishment of applications that use fuzzy logic in the resolution of certain problems.
FPGA implementation of a fuzzy based video de-interlacing algorithm
P. Brox, S. Sánchez-Solano, I. Baturone and A. Barriga
Conference · Conference on VLSI Circuits and Systems II, 2005
abstract
De-interlacing algorithms are used to convert interlaced video into progressive scan format. Among the different techniques reported in the literature, motion adaptive de-interlacing techniques that combine spatial and temporal interpolation according to the presence of motion achieve good results with a low computational cost. This paper presents the FPGA implementation of a motion adaptive algorithm which employs fuzzy logic in detecting motion and edges. Motion, which is evaluated at each pixel of the deinterlaced frame, determines the interpolation between an enhanced edge-dependent line average method and field insertion. Extensive simulations with video sequences show the advantages performance of the proposed method over other well-known de-interlacing techniques. The hardware implementation of the algorithm has been carried out on a FPGA obtaining a low-cost solution for real-time processing.
Codiseño Hardware/Software de controladores difusos mediante módulos de propiedad intelectual
A. Barriga, I. Barturone, P. Brox, A. Cabrera, F.J. Moreno and S. Sánchez-Solano
Conference · VI Congreso de Tecnologías Aplicadas a la Enseñanza de la Electrónica TAEE 2004
abstract
El uso de técnicas de diseño basadas en módulos de propiedad intelectual (IP) constituye una alternativa válida para salvar la creciente distancia entre los recursos proporcionados por las actuales tecnologías de fabricación de circuitos integrados y la productividad alcanzada por los diseñadores de sistemas. Esta comunicación describe el desarrollo de un sistema de control basado en lógica difusa mediante una técnica de codiseño hardware/software que combina un procesador de propósito general disponible como módulo-IP y hardware específico para la síntesis del módulo de inferencia. La implementación física se ha llevado a cabo mediante una plataforma de desarrollo basada en FPGAs, lo que permite la realización de todo el sistema como un SoPC (System on Programmable Chip).
Development of fuzzy control systems on programmable chips: Application to motion planning of mobile robots
A. Cabrera, S. Sánchez-Solano, I. Baturone, F. Moreno-Velo, P. Brox and A. Barriga
Conference · International Symposium on Robotics and Applications ISORA 2004
abstract
This paper describes the realization of embedded fuzzy control systems for planning the motion of autonomous mobile robots. The development of the controllers is carried out by means of a reconfigurable platform based on FPGAs. This platform combines a general-purpose processor with specific hardware to implement fuzzy inference modules, thus allowing the comparison between a fully software solution and others based on hybrid hardware/software techniques. Both the processing system and the inference modules are configurable using available CAD tools, which make the development of the controllers easier.
The parametric definition of membership functions in XFL3
F.J. Moreno-Velo, I. Baturone, S. Sánchez-Solano and A. Barriga
Conference · Annual IEEE International Conference on Fuzzy Systems FUZZ-IEEE 2004
abstract
This paper presents a study of the different kinds of membership function (MF) definitions, regarding free MFs and families of MFs, and describes the capabilities of XFL3 (the formal specification language defined by Xfuzzy 3) to manage them. This includes not only the possibility of using them in a system design, but also the capability for extending the available functions with new user-defined membership functions and families. An application example has been included in order to discuss on the suitable parametric definition of the functions.
Implementación sobre FPGAs de sistemas difusos programables
S. Sánchez-Solano, A. Cabrera, C.J. Jiménez, P. Brox, I. Baturone and A. Barriga
Conference · Workshop IBERCHIP 2003
abstract
El número de aplicaciones electrónicas que utilizan soluciones basadas en lógica difusa se ha incrementado considerablemente en los últimos años y, de forma paralela, se han desarrollado nuevas herramientas de CAD que contemplan diferentes técnicas de implementación para este tipo de sistemas. De entre ellas, el uso de arquitecturas específicas de procesado implementadas sobre FPGAs presenta como principales ventajas una buena relación 'coste-rendimiento' y un ciclo de desarrollo aceptablemente corto. En esta comunicación se analizan las distintas facilidades de síntesis que proporciona el entorno de diseño Xfuzzy para la implementación de sistemas difusos programables que aprovechen los recursos disponibles en las actuales familias de FPGAs.
VHDL high level modelling and implementation of fuzzy systems
A. Barriga, S. Sánchez-Solano, P. Brox, A. Cabrera and I. Baturone
Conference · International Workshop on Fuzzy Logic and Applications WILF 2003
abstract
In this paper we illustrate a fuzzy logic system design strategy based on a high level description. Employing this high level description, the knowledge base is described in a language in appearance close to the natural language with the particularity that it uses a hardware description language (VHDL) directly synthesizable on an FPGA circuit. In addition, we analyze FPCA implementations of different fuzzy inference hardware architectures in order to characterize them in terms of area and speed.
Rapid design of fuzzy systems with XFUZZY
F.J.M. Velo, I. Baturone, S. Sánchez-Solano and A. Barriga
Conference · IEEE International Conference on Fuzzy Systems FUZZ 2003
abstract
The crecient use of fuzzy systems in complex applications has motivated us to develop a new version of Xfuzzy, the design environment for fuzzy system created at the IMSE (Instituto de Microelectronica de Sevilla). This new version, Xfuzzy 3.0, offers the advantages of being enterely programmed in Java, and allows designing hierarchical rule bases that can interchange fuzzy or non fuzzy values as well as employ user-defined fuzzy connectives, linguistic hedges, membership functions, and defuzzification methods. Xfuzzy 3.0 integrates tools that facilitate the description, tuning, verification, and synthesis of complex fuzzy systems. This is illustrated in this paper with the design of a fuzzy controller to solve a parking problem.
Hardware/Software Codesign Methodology for Fuzzy Controller Implementation
A. Cabrera, S. Sánchez-Solano, R. Senhadji, A. Barriga, C.J. Jiménez-Fernández
Conference · IEEE International Conference on Fuzzy Systems FUZZ-IEEE 2002
abstract
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This paper describes a HW/SW codesign methodology for the implementation of fuzzy controllers on a platform composed by a general-purpose microcontroller and specific processing elements implemented on FPGAs or ASICs. The different phases of the methodology, as well as the CAD tools used in each design stage, are presented, with emphasis on the fuzzy system development environment Xfuzzy. Also included is a practical application of the described methodology for the development of a fuzzy controller for a dosage system.
Development of level controllers based on fuzzy logic
A. Cabrera, R. Senhadji, S. Sánchez-Solano, A. Barriga, C.J. Jiménez-Fernández and O. Llanes
Conference · International ICSC-NAISO Congress on Neuro-Fuzzy Technologies NF 2002
abstract
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This paper describes the development of different kinds of level controllers based on fuzzy logic. Designs and implementations were carried out using tools from xfuzzy, a development environment that eases the different stages in the design of fuzzy inference systems. Special emphasis has been put in the on-line verification of the controller over a physical plant by means of xflab tool. Different approaches of the knowledge base were tested using xflab. Then, the results were analyzed and selected those that gave the better performance. Controllers implementations with different number of bit for input/output resolution were also carried out and analyzed. The results provide a base for the incoming development of a hardware fuzzy logic controller by means of specific hardware or by an embedded codesign system.
NORFREA: An algorithm for non redundant fuzzy rule extraction
R. Senhadji, S. Sánchez-Solano, A. Barriga, I. Baturone and F.J. Moreno-Velo
Conference · IEEE Int. Conference on Systems, Man and Cybernetics 2002
abstract
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This contribution presents a new algorithm (NORFREA) to select fuzzy rules from a grid partition of the input domain. Besides using an efficiency measure for the rules, this algorithm employs an heuristic technique to reduce the influence of the initial grid structure. Different benchmarks of classification problems are included to illustrate the advantages of this algorithm.
Prototyping of fuzzy logic-based controllers using standard FPGA development boards
S. Sánchez-Solano, R. Senhadji, A. Cabrera, I. Baturone, C.J. Jiménez and A. Barriga
Conference · IEEE International Workshop on Rapid System Prototyping RSP 2002
abstract
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This paper describes a design methodology for fuzzy logic-based control systems. The methodology employs hardware/software codesign techniques according to an 'a priori' partition of the tasks assigned to the selected components. This feature makes it possible to tackle the control system prototyping as one of the design stages. In our case, the platform considered for prototyping has been a development board containing a standard microcontroller and an FPGA. Experimental results from an actual control application validate the efficiency of this methodology.
Books
Mining and control of network traffic by computational intelligence
F. Montesino-Pouzols, D.R. López and A. Barriga-Barros
Book · SCI vol. 342 p, 2011
abstract
link
As other complex systems in social and natural sciences as well as in engineering, the Internet is hard to understand from a technical point of view. Packet switched networks defy analytical modeling. The Internet is an outstanding and challenging case because of its fast development, unparalleled heterogeneity and the inherent lack of measurement and monitoring mechanisms in its core conception.
This monograph deals with applications of computational intelligence methods, with an emphasis on fuzzy techniques, to a number of current issues in measurement, analysis and control of traffic in the Internet. First, the core building blocks of Internet Science and other related networking aspects are introduced. Then, data mining and control problems are addressed. In the first class two issues are considered: predictive modeling of traffic load as well as summarization of traffic flow measurements. The second class, control, includes active queue management schemes for Internet routers as well as window based end-to-end rate and congestion control. The practical hardware implementation of some of the fuzzy inference systems proposed here is also addressed. While some theoretical developments are described, we favor extensive evaluation of models using real-world data by simulation and experiments.
Book Chapters
Open FPGA-based development platform for fuzzy inference systems
F.M. Pouzols, D.R. López and A. Barriga-Barros
Book Chapter · Mining and Control of Network Traffic by Computational Intelligence, SCI, vol. 342, pp 263-304, 2011
abstract
doi pdf
This chapter looks into the practical implementation of some of the fuzzy inference systems proposed in previous chapters. Both architectural and operational constraints are considered. The focus is on an open FPGA-based hardware platform for the implementation of efficient fuzzy inference systems for solving problems in high-performance packet switched networks. A feasibility study is conducted in order to show that the techniques developed can be deployed in current and future network scenarios with satisfactory performance.
Hardware implementation of a real-time image segmentation circuit based on fuzzy logic for edge detection application
A. Barriga-Barros
Book Chapter · Image Segmentation, pp 519-538, 2011
abstract
doi pdf
In this chapter there has been described a mechanism for binary image segmentation based on the application of fuzzy logic to calculate the threshold. The described thresholding method allows to adjust the threshold value to the characteristics of the image. The main advantage of this technique is that it allows very efficient hardware implementation in terms of cost and speed. This makes it especially suitable for applications which require real time processing. This technique has been applied for edge detection in images. The designed circuit has been implemented on an FPGA device.
Application of fuzzy logic and Lukasiewicz operators for image contrast control
A. Barriga, A and N.M. Hussein-Hassan
Book Chapter · New Advances in Intelligent Signal Processing, SCI, vol. 372, pp 133-154, 2011
abstract
doi pdf
This chapter reviews image enhancement techniques. In particular the chapter is focused in soft computing technique to improve the contrast of images. There is a wide variety of contrast control techniques. However, most are not suitable for hardware implementation. A technique to control the contrast in images based on the application of Lukasiewicz algebra operators and fuzzy logic is described. In particular, the technique is based on the bounded-sum and the bounded-product . The selection of the control parameters is performed by a fuzzy system. An interesting feature when applying these operators is that it allows low cost hardware realizations (in terms of resources) and high processing speed.
Logic synthesis
A. Barriga-Barros, C.J. Jiménez-Fernández and M. Valencia-Barrero
Book Chapter · Encyclopedia of Computer Science and Engineering, pp 1753-1762, 2009
abstract
doi
This article addresses logic synthesis, which involves the generation of a circuit at the logic level based on an RT level design specification. The article deals with aspects associated with logic design such as data types, system components, and modes of operation. The hardware description languages will be presented as tools to specify digital systems. Two standard languages (VHDL and Verilog) will be examined in detail, and the use of VHDL for automatic synthesis will be explained to illustrate specific aspects of logic synthesis descriptions. The article ends with an illustrative example of the principal concepts discussed.
High speed soft computing based circuit for edges detection in images
N.M. Hussein and A. Barriga
Book Chapter · Advances in Electrical Engineering and Computational Science, LNEE, vol. 39, pp 183-194, 2009
abstract
doi
In this chapter a technique for detecting edges in images is presented. The technique is based on applying soft computing techniques such as fuzzy logic and Lukasiewicz algebra operator. The utility of this technique is related to the simplicity of the operations for edge calculation that makes it very suitable for low cost hardware implementation and high processing speed. © 2009 Springer Netherlands.
Performance Analysis of Multimedia Traffic
F. Montesino, D.R. López, A. Barriga and S. Sánchez-Solano
Book Chapter · Encyclopedia of Networked and Virtual Organizations, pp 1196-1203, 2008
abstract
doi
The Internet and, more specifically, Web-based applications now provide the first-ever global, easy-to-use, ubiquitous and economical communications channel. Most companies have already automated their operations to some extent, which enhances their ability to interact with other companies electronically. With the advent of Web services, the interaction between companies becomes easier and more transparent (Khalaf, Curbera, Nagy, Tai, Mukhi, & Duftler, 2005). Web-based technologies are extensively employed and support core components of virtual and networked organizations. Many of them, including for instance Web-based communities, heavily rely on Web traffic. Additionally, Web technologies play a central role in the technologies for supporting industrial virtual enterprises (VE) being developed by the National Industrial Information Infrastructure Protocols Consortium (NIIIP). Thus, modelling and analysis techniques for Web traffic become important tools for performance analysis of virtual organizations (Malhotra, 2000; Foster, Kesselman, & Tuecke, 2001). This article overviews current models of Web traffic as well as performance analysis of Web-based systems.
Performance Measurement of Computer Networks
F. Montesino, D.R. López, A. Barriga and S. Sánchez-Solano
Book Chapter · Encyclopedia of Networked and Virtual Organizations, pp 1216-1222, 2008
abstract
doi
The Internet and, more specifically, Web-based applications now provide the first-ever global, easy-to-use, ubiquitous and economical communications channel. Most companies have already automated their operations to some extent, which enhances their ability to interact with other companies electronically. With the advent of Web services, the interaction between companies becomes easier and more transparent (Khalaf, Curbera, Nagy, Tai, Mukhi, & Duftler, 2005). Web-based technologies are extensively employed and support core components of virtual and networked organizations. Many of them, including for instance Web-based communities, heavily rely on Web traffic. Additionally, Web technologies play a central role in the technologies for supporting industrial virtual enterprises (VE) being developed by the National Industrial Information Infrastructure Protocols Consortium (NIIIP). Thus, modelling and analysis techniques for Web traffic become important tools for performance analysis of virtual organizations (Malhotra, 2000; Foster, Kesselman, & Tuecke, 2001). This article overviews current models of Web traffic as well as performance analysis of Web-based systems.
Performance Analysis of Peer-to-Peer Traffic
F. Montesino, D.R. López, A. Barriga and S. Sánchez-Solano
Book Chapter · Encyclopedia of Networked and Virtual Organizations, pp 1210-1215, 2008
abstract
doi
Peer-to-peer (P2P) networks have recently emerged as an attractive solution to enable large-scale content distribution without requiring major infrastructure investments. Recent developments have led to a significant maturity increase of peer-to-peer technologies, which are currently available as tools for performing core tasks in virtual and networked organizations.
Performance analysis and models of web traffic
F. Montesino-Pouzols, D.R. López, A. Barriga-Barros and S. Sánchez-Solano
Book Chapter · Encyclopedia of Networked and Virtual Organizations, pp 1196-1203, 2007
abstract
doi
The Internet and, more specifically, Web-based applications now provide the first-ever global, easy-to-use, ubiquitous and economical communications channel. Most companies have already automated their operations to some extent, which enhances their ability to interact with other companies electronically. With the advent of Web services, the interaction between companies becomes easier and more transparent (Khalaf, Curbera, Nagy, Tai, Mukhi, & Duftler, 2005). Web-based technologies are extensively employed and support core components of virtual and networked organizations. Many of them, including for instance Web-based communities, heavily rely on Web traffic. Additionally, Web technologies play a central role in the technologies for supporting industrial virtual enterprises (VE) being developed by the National Industrial Information Infrastructure Protocols Consortium (NIIIP). Thus, modelling and analysis techniques for Web traffic become important tools for performance analysis of virtual organizations (Malhotra, 2000; Foster, Kesselman, & Tuecke, 2001). This article overviews current models of Web traffic as well as performance analysis of Web-based systems.
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