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♦ Premio a la mejor contribución al congreso DCIS 2020
Los investigadores del IMSE-CNM P. Sarazá-Canflanca, H. Carrasco-López, P. Brox, R. Castro-López, E. Roca and F.V. Fernández han sido galardonados con el premio a la mejor contribución al congreso DCIS 2020, con el trabajo titulado 'Improving the reliability of SRAM-based PUFs under varying conditions'.
19 Noviembre 2020
La investigadora del IMSE Teresa Serrano Gotarredona ha sido nombrada por el Consejo de Gobierno de la Junta de Andalucía nueva Directora General de Investigación y Transferencia del Conocimiento de la Consejería de Transformación Económica, Industria, Conocimiento y Universidades.
17 Noviembre 2020
El proyecto 'Advancing in cybersecurity technologies' financiado por el programa i-LINK del CSIC celebró una reunión virtual entre sus participantes el 17 de Noviembre. Los participantes presentaron los últimos avances en sus respectivos grupos de investigación e intercambiaron ideas para futuros trabajos colaborativos. En este proyecto participan investigadores del Instituto de Microelectrónica de Sevilla, del Instituto de Tecnologías Físicas y de la Información, la Universidad de Tampere (Finlandia) y la Universidad de Michigan (Estados Unidos de América).
17 Noviembre 2020
El Prof. José M. de la Rosa impartió una conferencia dentro del ciclo de IEEE-CASS RS Talks titulada "Analog/Digital Interfaces in the Era of Digital Transformation".
30 Octubre 2020

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Últimas publicaciones
An efficient transformer modeling approach for mm-wave circuit design  »
In this paper, a Gaussian-process surrogate modeling methodology is used to accurately and efficiently model transformers, which are still a bottleneck in radio-frequency and millimeter-wave circuit design. The proposed model is useful for a wide range of frequencies from DC up to the millimeter-wave range (over 100 GHz). The technique is statistically validated against full-wave electromagnetic simulations. The efficient model evaluation enables its exploitation in iterative user-driven design approaches, as well as automated design exploration involving thousands of simulations. As experimental results, the model is used in several scenarios, such as the design of an inter-stage amplifier operating at 60 GHz, where the model assisted in the simulation of the transformers and baluns used, and the design of individual transformers and a matching network.

Journal Paper - AEU - International Journal of Electronics and Communications, vol. 128, article 153496, 2021 ELSEVIER
DOI: 10.1016/j.aeue.2020.153496    ISSN: 1434-8411    » doi
F. Passos, E. Roca, J. Sieiro, R. Castro-Lopez and F.V. Fernandez
Improving the reliability of SRAM-based PUFs under varying conditions  »
Abstract not available

Conference - Conference on Design of Circuits and Integrated Systems DCIS 2020
P. Sarazá-Canflanca, H. Carrasco-López, P. Brox, R. Castro-López, E. Roca and F.V. Fernández
Secure Management of IoT Devices Based on Blockchain Non-fungible Tokens and Physical Unclonable Functions  »
One of the most extended applications of blockchain technologies for the IoT ecosystem is the traceability of the data and operations generated and performed, respectively, by IoT devices. In this work, we propose a solution for secure management of IoT devices that participate in the blockchain with their own blockchain accounts (BCAs) so that the IoT devices themselves can sign transactions. Any blockchain participant (including IoT devices) can obtain and verify information not only about the actions or data they are taking but also about their manufacturers, managers (owners and approved), and users. Non Fungible Tokens (NFTs) based on the ERC-721 standard are proposed to manage IoT devices as unique and indivisible. The BCA of an IoT device, which is defined as an NFT attribute, is associated with the physical device since the secret seed from which the BCA is generated is not stored anywhere but a Physical Unclonable Function (PUF) inside the hardware of the device reconstructs it. The proposed solution is demonstrated and evaluated with a low-cost IoT device based on a Pycom Wipy 3.0 board, which uses the internal SRAM of the microcontroller ESP-32 as PUF. The operations it performs to reconstruct its BCA in Ethereum and to carry out transactions take a few tens of milliseconds. The smart contract programmed in Solidity and simulated in Remix requires low gas consumption.

Journal Paper - Lecture Notes in Computer Science, ACNS 2020: Applied Cryptography and Network Security Workshops, vol. 12418, pp 24-40, 2020 SPRINGER
DOI: 10.1007/978-3-030-61638-0_2    ISSN: 0302-9743    » doi
J. Arcenegui, R. Arjona and I. Baturone
Hardware Implementation of Deep Network Accelerators Towards Healthcare and Biomedical Applications  »
With the advent of dedicated Deep Learning (DL) accelerators and neuromorphic processors, new opportunities are emerging for applying deep and Spiking Neural Network (SNN) algorithms to healthcare and biomedical applications at the edge. This can facilitate the advancement of the medical Internet of Things (IoT) systems and Point of Care (PoC) devices. In this paper, we provide a tutorial describing how various technologies ranging from emerging memristive devices, to established Field Programmable Gate Arrays (FPGAs), and mature Complementary Metal Oxide Semiconductor (CMOS) technology can be used to develop efficient DL accelerators to solve a wide variety of diagnostic, pattern recognition, and signal processing problems in healthcare. Furthermore, we explore how spiking neuromorphic processors can complement their DL counterparts for processing biomedical signals. After providing the required background, we unify the sparsely distributed research on neural network and neuromorphic hardware implementations as applied to the healthcare domain. In addition, we benchmark various hardware platforms by performing a biomedical electromyography (EMG) signal processing task and drawing comparisons among them in terms of inference delay and energy. Finally, we provide our analysis of the field and share a perspective on the advantages, disadvantages, challenges, and opportunities that different accelerators and neuromorphic processors introduce to healthcare and biomedical domains. This paper can serve a large audience, ranging from nanoelectronics researchers to biomedical and healthcare practitioners in grasping the fundamental interplay between hardware, algorithms, and clinical adoption of these tools, as we shed light on the future of deep networks and spiking neuromorphic processing systems.

Journal Paper - IEEE Transactions on Biomedical Circuits and Systems, first online, 2020 IEEE
DOI: 10.1109/TBCAS.2020.3036081    ISSN: 1932-4545    » doi
M. Rahimiazghadi, C. Lammie, J.K. Eshraghian, M. Payvand, E. Donati, B. Linares-Barranco and G. Indiveri
A Post-Quantum Biometric Template Protection Scheme Based on Learning Parity with Noise (LPN) Commitments  »
Biometric recognition has the potential to authenticate individuals by an intrinsic link between the individual and their physical, physiological and/or behavioral characteristics. This leads a higher security level than the authentication solely based on knowledge or possession. One of the reasons why biometrics is not completely accepted is the lack of trust in the storage of biometric templates in external servers. Biometric data are sensitive data which should be protected as is contemplated in the data protection regulation of many countries. In this work, we propose the use of biometric Learning Parity With Noise (LPN) commitments as template protection scheme. To the best of our knowledge, this is the first proposal for biometric template protection based on the LPN problem (that is, the difficulty of decoding random linear codes), which offers post-quantum security. Biometric features are compared in the protected domain. Irreversibility, revocability, and unlinkability properties are satisfied as well as resistance to False Acceptance Rate (FAR), cross-matching, Stolen Token, and similarity-based attacks. A recognition accuracy with a 0% FAR is achieved, because user-specific secret keys are employed, and the False Rejection Ratio (FRR) can be adjusted depending on a threshold to preserve the accuracy of the unprotected scheme in the Stolen Token scenario. A good performance in terms of execution time, template storage and operation complexity is obtained for security levels at least of 80 bits. The proposed scheme is employed in a dual-factor authentication protocol from the literature to illustrate how it provides security using authentication and database (cloud) servers that can be malicious. The proposed LPN-based protected scheme can be applied to any biometric trait represented by binary features and any matching score based on Hamming or Jaccard distances. In particular, experimental results are included of a practical finger vein-based recognition .

Journal Paper - IEEE Access, vol. 8, pp 182355-182365, 2020 IEEE
DOI: 10.1109/ACCESS.2020.3028703    ISSN: 2169-3536    » doi
R. Arjona and I. Baturone

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