Consejo Superior de Investigaciones Científicas · Universidad de Sevilla
INTRANET  |  WEB MAIL
es    en
IMSE-CNM
US
CSIC
Noticias
Se buscan candidatos para un contrato de Titulado Superior en el área de Tecnología Electrónica y de Comunicaciones, para realizar tareas de investigación asociadas al proyecto SENIAC (Seguridad en Dispositivos Interconectados mediante Inyección de Algoritmos de Autenticación y Cifrado).
El Grupo de Sistemas Neuromórficos del IMSE busca candidatos para contratar un Diseñador Analógico con experiencia, para el diseño de chips de visión por eventos. El contrato está financiado por Chronocam Ltd. (www.chronocam.com). Salario negociable en función de la experiencia del candidato. Los interesados pueden contactar y enviar su CV a Bernabé Linares-Barranco (bernabeimse-cnmcsices).
El Grupo de Sistemas Neuromórficos del IMSE ofrece beca pre-doctoral para desarrollar el doctorado en diseño de chips de visión por eventos. La beca está financiado por Chronocam Ltd. (www.chronocam.com). Los interesados pueden contactar y enviar su CV a Bernabé Linares-Barranco (bernabeimse-cnmcsices).
El Grupo de Sistemas Neuromórficos del IMSE ofrece beca pre-doctoral FPI (Formación de Personal Investigador) financiada por el Ministerio de Economía y Competitividad, vinculada al Proyecto Oficial de Investigación "SISTEMA DE VISION COGNITIVA POR EVENTOS" (TEC2015-63884-C2-1-P). Los interesados pueden contactar y enviar su CV a Teresa Serrano Gotarredona (tereseimse-cnmcsices).
¿Qué hacemos en el Instituto de Microelectrónica de Sevilla?
Santiago Sánchez Solano. Director del IMSE.

El IMSE en la Noche Europea de los Investigadores.
30/09/2016

El Mundo de los Chips

Oferta de servicios basados en el sistema automático de test ATE Agilent 93000

Nuevo sitio web de la Biblioteca Campus Cartuja

El IMSE en los medios

Tríptico informativo

El IMSE en Linkedin

El IMSE en Linkedin

El IMSE en Digital.CSIC

El IMSE en Digital.CSIC

Últimas publicaciones
An automated design methodology of RF circuits by using Pareto-optimal fronts of EM-simulated inductors  »
A new design methodology for radiofrequency circuits is presented that includes electromagnetic (EM) simulation of the inductors into the optimization flow. This is achieved by previously generating the Pareto-optimal front (POF) of the inductors using EM simulation. Inductors are selected from the Pareto front and their S-parameter matrix is included in the circuit netlist that is simulated using an RF simulator. Generating the EM-simulated POF of inductors is computationally expensive, but once generated, it can be used for any circuit design. The methodology is illustrated both for a single-objective and a multi-objective optimization of a Low Noise Amplifier.

Journal Paper - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, first online, 2016 IEEE
DOI: 10.1109/TCAD.2016.2564362    ISSN: 0278-0070    » doi
R. González-Echevarría, E. Roca, R. Castro-López, F.V. Fernández, J. Sieiro, J.M. López-Villegas and N. Vidal
Image Sensing Scheme Enabling Fully-Programmable Light Adaptation and Tone Mapping with a Single Exposure  »
This letter presents new insights into a high dynamic range (HDR) technique recently reported. We demonstrate that two intertwined photodiodes per pixel can perform tone mapping under unconstrained illumination conditions with a single exposure. Experimental results attained from a prototype chip confirm the proposed theoretical framework. It opens the door to the realization of imagers providing HDR images free of artifacts without requiring any digital post-processing at all.

Journal Paper - IEEE Sensors Journal, vol. 16, no. 13, pp. 5121-5122, 2016 IEEE
DOI: 10.1109/JSEN.2016.2559158    ISSN: 1530-437X    » doi
J. Fernández-Berni, F.D.V.R. Oliveira, R. Carmona-Galán and A. Rodríguez-Vázquez
Reliability simulation for analog ICs: Goals, solutions, and challenges  »
The need for new tools and simulation methodologies to evaluate the impact of all reliability effects in ICs is a critical challenge for the electronic industry. Issues due to process-related variations (also known as spatial variability) are well-known and off-the-shelf simulation methods are available. On the other hand, models and simulation methods for the aging-related problems, which are becoming more important with each technology node, are far less mature, specially for analog ICs. In this sense, transistor wear-out phenomena such as Bias Temperature Instability (BTI) and Hot Carriers Injection (HCI) cause a time-dependent variability that occurs together with the spatial variability. A fundamental missing piece in the design flow is an efficient and accurate simulation methodology for IC reliability. To this goal, several challenges should be addressed properly: the essential nature of the stochastic behavior of aging (and thus resorting to stochastic models rather than deterministic ones), the correlation between spatial and aging-related variability, and relationship between biasing, stress and aging in analog ICs, among others. This paper discusses some of these challenges in detail.

Journal Paper - Integration, the VLSI Journal, Article in Press, first online, 2016 ELSEVIER
DOI: 10.1016/j.vlsi.2016.05.002    ISSN: 0167-9260    » doi
A. Toro-Frías, P. Martín-Lloret, J. Martin-Martinez, R. Castro-López, E. Roca, R. Rodriguez, M. Nafria and F.V. Fernández
Single-Exposure HDR Technique Based on Tunable Balance Between Local and Global Adaptation  »
This brief describes a high-dynamic-range technique that compresses wide ranges of illuminations into the available signal range with a single exposure. An online analysis of the image histogram provides the sensor with the necessary feedback to dynamically accommodate changing illumination conditions. This adaptation is accomplished by properly weighing the influence of local and global illuminations on each pixel response. The main advantages of this technique with respect to similar approaches previously reported are as follows: 1) standard active-pixel-sensor circuitry can be used to render the pixel values and 2) the resulting compressed image representation is ready either for readout or for early vision processing at the very focal plane without requiring any additional peripheral circuit block. Experimental results from a prototype smart image sensor achieving a dynamic range of 102 dB are presented.

Journal Paper - IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 63, no. 5, pp. 488-492, 2016 IEEE
DOI: 10.1109/TCSII.2015.2505263    ISSN: 1549-7747    » doi
J. Fernández-Berni, R. Carmona-Galán and A. Rodríguez-Vázquez
La nanotecnología: explorando un cosmos en miniatura  »
Abstract not available

Book - Colección: Un paseo por el cosmos, 2016 RBA EDITORES

A.J. Acosta Jiménez

Webs relacionadas con el IMSE
Parque Científico y Tecnológico Cartuja, Calle Américo Vespucio s/n, 41092, Sevilla. Teléfono: 954466666, Fax: 954466600
viernes, 26 de agosto de 2016
Última actualización: 25.08.2016
  infoimse-cnmcsices

© Copyright 2016 IMSE-CNM
Los contenidos de estas páginas web tienen solo carácter informativo. Los datos que aparecen pueden contener errores o no estar actualizados.
La información disponible, salvo indicación expresa en contrario, es susceptible de ser reutilizada total o parcialmente siempre que se cite la fuente de los documentos y su fecha de actualización.
En cualquier caso, este uso se regirá de acuerdo con lo legalmente dispuesto por el Consejo Superior de Investigaciones Científicas para publicarla en cualquier soporte o para utilizarla, distribuirla o incluirla en otros contextos accesibles a terceras personas.
Aviso legal web CSIC