IMSE-CNM

The book presents a top-down circuit description for the implementation of asynchronous vision sensors based on Single-Photon Avalanche Diodes (SPADs). It provides design considerations to convey the SPADs pulses through a channel shared by all the pixels. The book also presents architectures where dynamic vision sensors and SPADs converge.

Design of Event-Driven SPAD-Based 3D Image Sensors provides detailed technical insights about novel image sensor architectures with SPADs with asynchronous operation. At the sensor level, the book provides asynchronous circuitry to read and arbiter the pixel outputs. The authors explore new LiDAR architectures with asynchronous operation and provide insights into their design. A detailed benchmark of modern and competitive LiDAR systems is also presented. At the pixel level, the book provides design considerations to convey the SPADs pulses through a channel shared by all the pixels. At the sensor level, the book provides asynchronous circuitry to read and arbiter the pixel outputs. Finally, experimental results of very novel LiDAR systems with asynchronous operation will be provided and analyzed.

The book is written for professionals who want to explore new tendencies on the design of image sensors for the implementation of LiDAR systems.

Cybersecurity is rooted in hardware to achieve high security. Physical unclonable functions (PUFs) are cryptographic primitives that implement one-way functions to generate cryptographic keys on-demand. Current approaches implement PUFs using microelectronic circuits that exploit the random manufacturing variabilities. Other alternatives exploit optical principles to offer higher security. However, their reliability is compromised by environmental effects and integrated systems are still to be realized. Here a novel approach is proposed to enhance reliability and potentially enable integration in digital security systems. The proposed method uses the acousto-optical effect to interrogate optical PUFs, avoiding precision alignment of moving parts and bulky equipment. This way of interrogating the PUF can also be miniaturized in a photonic integrated circuit. The experimental results demonstrate the feasibility of this approach and the potential for generating a large number of truly random cryptographic keys.

This paper presents an API designed for a hardware-based Root of Trust that provides a suite of essential cryptographic and security functions based on hardware cryptographic IP cores. The high-level abstraction of the API enables software developers to create secure applications within secure computing systems by leveraging the benefits of hardware IP cores. The hardware IP cores that support the API are compliant with international standards, ensuring robust security and reliability. The API development adheres to the open-source science policies and is published online under a public license. Additionally, the portability of the API across multiple platforms ensures wide compatibility and accessibility, enabling seamless integration and reproducibility.

This paper presents the design and implementation of a Karatsuba multiplier to accelerate digital signature schemes on embedded systems. The Karatsuba algorithm is integrated into hardware accelerators for RSA and EdDSA, representing a fundamental component of contemporary, state-of-the-art implementations. A hardware/software co-design methodology is employed, implementing the architectures on a System-onChip platform that combines programmable logic with an ARM processor. The results showcase enhanced resource consumption and timing performance for both signature generation and verification, confirming the superiority of EdDSA over RSA when utilizing the same Karatsuba multiplier core and coding techniques.