Publicaciones del IMSE

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Autor: Elisa Calvo Gallego
Año: Desde 2002

Artículos de revistas


Low-cost dedicated hardware IP modules for background subtraction in embedded vision systems
E. Calvo-Gallego, P. Brox and S. Sanchez-Solano
Journal Paper · Journal of Real-Time Image Processing, vol. 12, no. 4, pp 681-695, 2016
resumen      doi      

This paper presents the design and implementation of dedicated hardware IP modules for background subtraction, which are suitable to be implemented in embedded vision systems and are efficient in terms of performance, resource consumption, and operational speed. To achieve this goal, a comprehensive experimental study of different algorithms has been carried out by evaluating a wide range of quality parameters. From the results of this analysis, five candidate algorithms were selected and implemented using a model-based design methodology supported by Matlab and Xilinx FPGA tools. Using only the internal block memory available in the FPGA, they provide adequate solutions for processing low-resolution images with CIF and QCIF formats.

Congresos


Hardware implementation of fuzzy inference systems for real-time video processing applications
S. Sánchez-Solano, M. Brox, E. Calvo-Gallego, A. Gersnoviez and P. Brox
Conference · XVIII Congreso Español sobre Tecnologías y Lógica Fuzzy ESTYLF 2016
resumen     

As a consequence of its ability to handle inaccurate or incomplete information and its capacity to mimic the human reasoning schema, Fuzzy Logic-based techniques have been widely used in many image processing algorithms [1] [2]. Incorporating these algorithms into current embedded video processing systems requires the use of specific hardware designs capable of providing the data-transfer rates demanded by existing applications [3]. This paper presents a hardware architecture for fuzzy inference systems which is able to provide an inference in each clock cycle, thus allowing the usage of fuzzy techniques in low- and middle-level video processing tasks. Even though the architecture imposes some limitations on the membership functions and inference mechanisms that can be used, it may be suitable for hardware implementation of many fuzzy solutions proposed in the literature.

Hardware/Software co-design of video processing applications on a reconfigurable platform
J. Cerezuela-Mora, E. Calvo-Gallego and S. Sánchez-Solano
Conference · IEEE International Conference on Industrial Technology ICIT 2015
resumen     

The use of a reconfigurable platform, based on the Zynq-7000 Xilinx family, for hardware/software co-design of video processing applications is described in this work. The computing capability of ARM processors included in the device allows performing I/O and processing task by using conventional software libraries. On the other hand, the possibility to accelerate certain tasks through specific hardware implementation on the available programmable logic makes it easier to compare different design alternatives. The advantages of the proposed platform are demonstrated by using different design flows to implement some spatial filters usually required in video processing systems.

Hardware implementation of a background substraction algorithm in FPGA-based platforms
E. Calvo-Gallego, P. Brox and S. Sánchez-Solano
Conference · IEEE International Conference on Industrial Technology ICIT-2015
resumen     

Different strategies for the implementation of a fuzzy logic-based background subtraction algorithm are presented in this paper. The goal of this contribution is to obtain an efficient implementation suitable to be integrated into hardware platforms with limited resources. In order to find an adequate performance-resources trade-off, the design space is explored taken into account several strategies and implementation options. The final implementation is encapsulated within an IP core that has been used in a demonstrator, built on a Spartan-3A-DSP FPGA development board, suitable for processing VGA (640x480P) @ 60 Hz.

Automatic ROI for remote photoplethysmography using PPG and color features
E. Calvo-Gallego and G. de Haan
Conference · Int. Joint Conference on Computer Vision, Imaging and Computer Graphics Theory and Applications VISIGRAPP 2015
resumen     

Remote photoplethysmography (rPPG) enables contact-less monitoring of the blood volume pulse using a regular camera, thus providing valuable information about the cardiovascular system. However, the quality of the acquired rPPG signal is strongly affected by the region of skin where the analysis is carried out and, therefore, to be confident of obtaining valid information, a pre-selection of the region-of-interest (ROI) for the PPG analysis is necessary. In this paper, we propose a method for the automatic extraction of this ROI combining the local characteristics of the PPG-signal with the color information using fuzzy logic. Results of the quality of the ROI extraction and its application on pulse rate detection are provided.

Hardware implementation of smart embedded vision systems
E. Calvo-Gallego, P. Brox and S. Sánchez-Solano
Conference · Int. Joint Conference on Computer Vision, Imaging and Computer Graphics Theory and Applications VISIGRAPP 2014
resumen     

The research presented in this contribution is focused on the efficient hardware implementation of image processing algorithms that are present at different levels of a smart vision system. The system is conceived as a reconfigurable embedded device which, in turn, will be a node of a collaborative sensor network. The inclusion of fuzzy logic techniques is explored to improve the performance of conventional vision algorithms.

FPGA based embedded systems for video processing
P. Brox, E. Calvo-Gallego and S. Sanchez-Solano
Conference · Workshop on the the Architecture of Smart Cameras WASC 2013
resumen     

Abstract not available

A Fuzzy System for Background Modeling in Video Sequences
E. Calvo-Gallego, P. Brox and S. Sánchez-Solano
Conference · International Workshop on Fuzzy Logic and Applications WILF 2013
resumen     

Many applications in video processing require the background modeling as a first step to detect the moving objects in the scene. This paper presents an approach that calculates the updating weight of a recursive adaptive filter using a fuzzy logic system. Simulation results prove the advantages of the fuzzy approach versus conventional methods such as temporal filters.

Real-Time FPGA Connected Component Labeling System
E. Calvo-Gallego, A. Cabrera-Aldaya, P. Brox and S. Sánchez-Solano
Conference · IEEE Int. Conf. on Electronics, Circuits, and Systems ICECS 2012
resumen      pdf

The implementation of a connected component labeling algorithm (CCL) for real-time operation is presented in this paper. The algorithm, which was designed and implemented following a model-based methodology centered on Matlab/Simulink and Xilinx-System Generator, uses horizontal and vertical blanking periods to improve the quality of labeling and increase the operation speed. Its performance, with a VGA 640 x 480 P @ 60 Hz video, is shown by means of its integration on a complete video processing system over a Spartan-3A DSP 3400 development board.

Implementación sobre FPGA de un algoritmo de etiquetado en tiempo real
E. Calvo-Gallego, P. Brox and S. Sánchez-Solano
Conference · Jornadas de Computación Reconfigurable y Aplicaciones JCRA2012
resumen      pdf

En esta comunicación se presenta una implementación de un algoritmo de etiquetado de componentes conexos en tiempo real que aprovecha los intervalos de supresión horizontal y vertical en la fuente de la imagen para mejorar la calidad del etiquetado y acelerar la frecuencia de trabajo. El diseño se ha llevado a cabo usando la herramienta System Generator de Xilinx lo que ha permitido reducir los tiempos de implementación y verificación lógica y funcional del modelo.

Un algoritmo en tiempo real para etiquetado de componentes conectados en imágenes
E. Calvo-Gallego, P. Brox and S. Sánchez-Solano
Conference · Iberchip XVIII Workshop IWS 2012
resumen      pdf

Esta comunicación presenta un algoritmo de dos pasadas para el etiquetado en tiempo real de los componentes conexos en una imagen. El algoritmo propuesto es una buena opción frente a otras alternativas de dos y múltiples pasadas ya que ha sido diseñado considerando que su implementación en FPGAs ofrezca un buen compromiso entre recursos ocupados y velocidad de operación. Se describen dos implementaciones hardware de este algoritmo, cuyo desarrollo se ha llevado a cabo siguiendo un flujo de diseño basado en la herramienta System Generator de Xilinx.

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