Spanish National Research Council · University of Seville
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Author: Ceballos Cáceres , Joaquín
Year: Since 2002
All publications
SIS20: A CMOS ASIC for Solar Irradiance Sensors in Mars Surface
D. Vázquez, J. Ceballos and S. Espejo
Conference - Int. Workshop on Analogue and Mixed Signal Integrated Circuits For Space Applications AMICSA 2018
[abstract]
This paper reports the design and characterization of the ASIC SIS20, planned for an instrument aimed to measure Solar Irradiance on the surface of Mars. It has been designed using the AMS0.35u CMOS technology and with the rad-hard digital library developed at IMSE (Spain). The ASIC is intended for flying with the ExoMars2020 mission.

Characterization, Screening and Qualification of the MEDA Wind-Sensor ASIC
S. Espejo, J. Ceballos, A. Ragel, L. Carranza, J.M. Mora, M.A. Lagos, J. Ramos, S. Sordo, E. Cordero and D. López
Conference - Int. Workshop on Analogue and Mixed Signal Integrated Circuits For Space Applications AMICSA 2018
[abstract]
The paper describes the final characterization results of the MEDA-WS ASIC, which was described in a previous paper in AMICSA-2016. It describes as well the qualification and the screening processes that have been carried out, and the present status of its integration and calibration in the final engineering and flying modules of the wind-sensor instrument.

Using Arduino and On-Chip Serial-to-Parallel Register to Test Widely-Programmable ADCs
L.A. García-Lugo, E.C. Becerra-Alvarez, J. Ceballos-Cáceres and J.M. de la Rosa
Conference - Conference on Design of Circuits and Integrated Systems DCIS 2016
[abstract]
This paper presents an experimental set-up that combines on-chip digital techniques with off-chip Arduino-based hardware to simplify the test of widely-programmable analog-to-digital converters. The presented methodology is specially intended for analog and mixed-signal circuits which require a large number of digital signals to reconfigure their performance to different electrical specifications, environment signal conditions, battery status, etc. To this end, a serial-to-parallel register is implemented on chip in order to generate the required number of digital control signals from an input serial data provided offchip. Such serial data can be generated by using an Arduino-based hardware set-up, which can be easily programmed in MATLAB, with no additional test instruments required. As an application, the proposed method is applied to the experimental characterization of a fourth-order band-pass continuous-time ΣΔ modulator, integrated in a 65-nm CMOS technology, which can digitize signals placed at programmable carrier frequencies for software defined radio.

CMOS Rad-Hard Front-End Electronics for Precise Sensors Measurements
S. Sordo-Ibáñez, B. Piñero-García, M. Muñoz-Díaz, A. Ragel-Morales, J. Ceballos-Cáceres, L. Carranza-González, S. Espejo-Meana, A. Arias-Drake, J. Ramos-Martos, J.M. Mora-Gutierrez and M.A. Lagos-Florido
Journal Paper - IEEE Transactions on Nuclear Science, vol. 63, no. 4, pp. 2379-2389, 2016
IEEE    DOI: 10.1109/TNS.2016.2586140    ISSN: 0018-9499    » doi
[abstract]
This paper reports a single-chip solution for the implementation of radiation-tolerant CMOS front-end electronics (FEE) for applications requiring the acquisition of base-band sensor signals. The FEE has been designed in a 0.35 μm CMOS process, and implements a set of parallel conversion channels with high levels of configurability to adapt the resolution, conversion rate, as well as the dynamic input range for the required application. Each conversion channel has been designed with a fully-differential implementation of a configurable-gain instrumentation amplifier, followed by an also configurable dual-slope ADC (DS ADC) up to 16 bits. The ASIC also incorporates precise thermal monitoring, sensor conditioning and error detection functionalities to ensure proper operation in extreme environments. Experimental results confirm that the proposed topologies, in conjunction with the applied radiation-hardening techniques, are reliable enough to be used without loss in the performance in environments with an extended temperature range (between -25 and 125 °C) and a total dose beyond 300 krad.

Comparative study by IBIC of Si and SiC diodes irradiated with high energy protons
J. Garcia Lopez, M.C. Jimenez-Ramos, M. Rodriguez-Ramos, J. Ceballos, F. Linez and J. Raisanen
Journal Paper - Nuclear Instruments and Methods in Physics Research, Section B: Beam Interactions with Materials and Atoms, vol. 372, pp 143-150, 2016
ELSEVIER    DOI: 10.1016/j.nimb.2015.12.029    ISSN: 0168-583X    » doi
[abstract]
The transport properties of a series of Si and SiC diodes have been studied using the Ion Beam Induced Charge (IBIC) technique. Structural defects were induced into the samples during the irradiation with 17 MeV protons. The experimental values of the charge collection efficiency (CCE) vs bias voltages have been analyzed using a modified drift-diffusion model, which takes into account the recombination of carriers in the neutral and depletion regions. From these simulations, we have obtained the values of the carrier's lifetime for pristine and irradiated diodes, which are found to degrade faster in the case of the SiC samples. However, the decrease of the CCE at high bias voltages is more important for the Si detectors, indicative of the lower radiation hardness of this material compared to SiC. The nature of the proton-induced defects on Si wafers has been studied by Positron Annihilation Spectroscopy (PAS) and Doppler Broadening Spectroscopy (DBS). The results suggest that the main defect detected by the positrons in p-type samples is the divacancy while for n-type at least a fraction of the positron annihilate in another defect. The concentration of defects is much lower than the number of vacancies predicted by SRIM.

An upgraded drift-diffusion model for evaluating the carrier lifetimes in radiation-damaged semiconductor detectors
J. Garcia Lopez, M.C. Jimenez-Ramos, M. Rodriguez-Ramos, J. Forneris and J. Ceballos
Journal Paper - Nuclear Instruments and Methods in Physics Research, Section B: Beam Interactions with Materials and Atoms, vol. 371, pp. 294-297, 2016
ELSEVIER    DOI: 10.1016/j.nimb.2015.09.012    ISSN: 0168-583X    » doi
[abstract]
The transport properties of a series of n- and p-type Si diodes have been studied by the ion beam induced charge (IBIC) technique using a 4MeV proton microbeam. The samples were irradiated with 17MeV protons at fluences ranging from 1×10(12) to 1×10(13) p/cm2 in order to produce a uniform profile of defects with depth. The analysis of the charge collection efficiency (CCE) as a function of the reverse bias voltage has been carried out using an upgraded drift-diffusion (D-D) model which takes into account the possibility of carrier recombination not only in the neutral substrate, as the simple D-D model assumes, but also within the depletion region. This new approach for calculating the CCE is fundamental when the drift length of carriers cannot be considered as much greater that the thickness of the detector due to the ion induced damage. From our simulations, we have obtained the values of the carrier lifetimes for the pristine and irradiated diodes, which have allowed us to calculate the effective trapping cross sections using the one dimension Shockley-Read-Hall model. The results of our calculations have been compared to the data obtained using a recently developed Monte Carlo code for the simulation of IBIC analysis, based on the probabilistic interpretation of the excess carrier continuity equations.

A modified drift-diffusion model for evaluating the carrier lifetimes in radiation-damaged semiconductor detectors
J. Garcia-Lopez, C. Jimenez-Ramos, M. Rodriguez-Ramos, J. Fornieris and J. Ceballos
Conference - International Conference on Ion Beam Analysis IBA 2015
[abstract]
The transport properties of a series of n and p-type Si diodes have been studied by the Ion Beam Induced Charge (IBIC) technique using a 4 MeV proton microbeam. The samples were irradiated with 17 MeV protons and fluences ranging from 1x1012 to 1x1013 p/cm2 in order to produce a uniform profile of defects with depth. The analysis of the charge collection efficiency (CCE) as a function of the reverse bias voltage has been carried out using a modified drift-diffusion (D-D) model which takes into account the possibility of carrier recombination not only in the neutral substrate, as the simple D-D model assumes, but also within the depletion region. This new approach for calculating the CCE is fundamental when the drift length of carriers cannot be considered much greater that the thickness of the detector due to the ion induced damage. From our simulations, we have obtained the values of the carrier lifetimes for the pristine and irradiated diodes, which have allowed us to calculate the effective trapping cross sections using the one dimension Shockley-Read-Hall model. The results of our calculations have been compared to the data obtained using a recently developed Monte Carlo code for the simulation of IBIC analysis, based on the probabilistic interpretation of the excess carrier continuity equations.

A Front-End ASIC for a 3-D Magnetometer for Space Applications by Using Anisotropic Magnetoresistors
S. Sordo-Ibáñez, B. Piñero-García, M. Muñoz-Díaz,A. Ragel-Morales, J. Ceballos-Cáceres, L. Carranza-González, S. Espejo-Meana, A. Arias-Drake, J. Ramos-Martos, J.M. Mora-Gutiérrez and M.A. Lagos-Florido
Journal Paper - IEEE Transactions on Magnetics, vo. 51, no. 1, article 4001804, 2015
IEEE    DOI: 10.1109/TMAG.2014.2356976    ISSN: 0018-9464    » doi
[abstract]
This paper presents an application-specific integrated circuit (ASIC) aimed for an alternative design of a digital 3-D magnetometer for space applications, with a significant reduction in mass and volume while maintaining a high sensitivity. The proposed system uses magnetic field sensors based on anisotropic magnetoresistances and a rad-hard mixed-signal ASIC designed in a standard 0.35 μm CMOS technology. The ASIC performs sensor-signal conditioning and analogue-to-digital conversion, and handles calibration tasks, system configuration, and communication with the outside. The proposed system provides high sensitivity to low magnetic fields, down to 3 nT, while offering a small and reliable solution under extreme environmental conditions in terms of radiation and temperature.

A fast readout electronic system for accurate spatial detection in ion beam tracking for the next generation of particle accelerators
A. Garzón-Camacho, B. Fernández, M.A.G. Álvarez, J. Ceballos and J.M. de la Rosa
Journal Paper - IEEE Transactions on Instrumentation and Measurement, vol. 64 , no. 2, pp 318-327, 2015
IEEE    DOI: 10.1109/TIM.2014.2344351    ISSN: 0018-9456    » doi
[abstract]
This paper presents the design, implementation, and measurements of a complete electronic frontend intended for high-resolution spatial detection of ion beams at counting rates higher than 106 particles per second (p/s). The readout system is made up of three main multichannel building blocks, namely, a transimpedance preamplifier, a signal-conditioning line receiver, and a charge-to-digital converter, as well as some off-the-shelf components. The preamplifier and the line receiver have been specifically designed and optimized to minimize the overlapping probability of ion beams tracking, at high counting rates, in low-pressure gaseous secondary electron detectors. Experimental results are shown, considering α particles sources and particles beams, featuring an adaptive shaping time frame of 170-230 ns with a peak signal-to-noise ratio of up to 25 dB. These performance metrics are competitive with the state of the art, demonstrating the suitability of the reported data acquisition and instrumentation system for precise and fast particle tracking detection.

Spatial Detection System for Mini-Secondary Electrons Detectors
A. Garzón-Camacho, B. Fernández, M.A.G. Alvarez, J. Ceballos and J.M. de la Rosa
Conference - Conference on Design of Circuits and Integrated Systems DCIS 2014
[abstract]
This paper describes the design and experimental characterization of an electronic front-end intended for spatial detection of ion beams at counting rates over 10^6 particles per second (pps). A multi-channel system architecture is considered, which is essentially made up of three main sub-systems: a TIA, a line receiver and a charge-to-digital converter. A number of experiments have been carried out considering different particles sources and physical conditions, demonstrating that the presented readout electronics is very appropriate for fast and precise particle tracking in secondary electrons detectors.

Four-channel self-compensating single-slope ADC for space environments
S. Sordo-Ibáñez, S. Espejo-Meana, B. Piñero-García, A. Ragel-Morales, J. Ceballos-Cáceres, M. Muñoz-Díaz, L. Carranza-González, A. Arias-Drake, J.M. Mora-Gutiérrez, M.A. Lagos-Florido and J. Ramos-Martos
Journal Paper - Electronics Letters, vol. 50, no.8, pp 579-581, 2014
INSTITUTION OF ENGINEERING AND TECHNOLOGY-IET    DOI: 10.1049/el.2014.0664    ISSN: 0013-5194    » doi
[abstract]
A multichannel high-resolution single-slope analogue-to-digital converter (SS ADC) is presented that automatically compensates for process, voltage and temperature variations, as well as for radiation effects, in order to be used in extreme environmental conditions. The design combines an efficient implementation by using a feedback loop that ensures an inherently monotonic and very accurate ramp generation, with high levels of configurability in terms of resolution and conversion rate, as well as input voltage range. The SS ADC was designed in a standard 0.35 μm CMOS technology. Experimental measurements of the performance and stability against radiation and temperature are presented to verify the proposed approach.

Readout Electronics System for Particle Tracking in Secondary Electron Detectors
A. Garzón-Camacho, B. Fernández, M.A.G. Alvarez, J. Ceballos and J.M. de la Rosa
Conference - IEEE Midwest Symposium on Circuits and Systems MWSCAS 2014
[abstract]
This paper presents the design and implementation of an electronic front-end intended for spatial detection of ion beams at counting rates higher than 10^6 particles per second. The readout system is made up of three main multi-channel building blocks, namely: a transimpedance preamplifier, a signalconditioning line receiver and a charge-to-digital converter, which are properly combined with some off-the-shelf components. Several experiments have been carried out, considering α particles sources and particles beams, featuring an adaptive shaping time frame of 170-to-230 ns with a peak signal-to-noise ratio of up to 25.2dB. These performance metrics are competitive with the state of the art, showing the suitability of the proposed data acquisition system for accurate and fast particle tracking detection.

A Front-End ASIC for a 3-D Magnetometer for Space Applications Based on Anisotropic Magnetoresistors
S. Sordo-Ibáñez, B. Piñero-García, M. Muñoz-Díaz, A. Ragel-Morales, J. Ceballos-Cáceres, L. Carranza-González, S. Espejo-Meana, A. Arias-Drake, J. Ramos-Martos, J.M. Mora-Gutiérrez and M.A. Lagos-Florido
Conference - European Conference on Magnetic Sensors and Actuators EMSA 2014
[abstract]
Abstract not avaliable

A Rad-Hard Multichannel Front-End Readout ASIC for Space Applications
S. Sordo-Ibáñez, B. Piñero-García, M. Muñoz-Díaz, A. Ragel-Morales, J. Ceballos-Cáceres, L. Carranza-González, S. Espejo-Meana, A. Arias-Drake, J. Ramos-Martos, J.M. Mora-Gutiérrez and M.A. Lagos-Florido
Conference - IEEE International Workshop on Metrology for Aerospace METROAEROSPACE 2014
[abstract]
This paper presents a single-chip solution for sensor-signals conditioning and digitalization in space applications. The rad-hard ASIC implements a set of 6 generic instrumentation channels that are highly configurable in terms of resolution, conversion rate, and input voltage range, providing a flexible solution for space applications requiring the digital acquisition of slow input signals with medium-to-high resolutions. The resolution can be configured between 12 bits at 19.6 kS/s and 16 bits at 2.6 kS/s. The differential input voltage range can be extended up to 4 Vpp. The instrumentation channels combine a programmable-gain, high input impedance instrumentation amplifier and dual-slope analog-to-digital converters with radiation hardening by design (RHBD) techniques in a standard 0.35 μm CMOS technology. Experimental results demonstrate the performance of the ASIC across an operating temperature range of -90 ºC to +125 ºC and its robustness against radiation effects up to 318 krad of TID, absence of latch-up up to at least 81.8 MeV·cm2/mg, and a SEUs LETth of 22.5 MeV·cm2/mg.

SEE Characterization of a Magnetometer Front-End ASIC using a RHBD Digital Library in AMS 0.35μm CMOS
J. Ramos-Martos, A. Arias-Drake, L. Carranza-González, S. Sordo-Ibáñez, J. Ceballos-Cáceres, J.M. Mora-Gutiérrez, B. Piñero-García, M. Muñoz-Díaz, A. Ragel-Morales, S. Espejo-Meana and M.A. Lagos-Florido
Conference - Int. Workshop on Analogue and Mixed Signal Integrated Circuits For Space Applications AMICSA 2014
[abstract]
A radiation-hardened-by-design (RHBD) digital library, developed for the Austria Microsystems (AMS) 0.35μm CMOS technology has been applied in a mixedsignal ASIC that operates as a multi-channel data acquisition system for magnetometers using anisotropic magnetoresistances (AMR). The circuit has been tested in the Heavy-Ion facilities of the Université Catholique de Louvain-la-Neuve (HIF-UCL). The experimental results demonstrate a LET threshold of 22.5 MeV·cm2/mg and absence of latchup up to 81.8 MeV·cm2/mg. This radiation-tolerant performance is obtained at the cost of a penalty in area and power with respect to the unhardened technology.

An Adaptive Approach to On-Chip CMOS Ramp Generation for High Resolution Single-Slope ADCs
S. Sordo-Ibanez, B. Piñero-García, S. Espejo-Meana, A. Ragel-Morales, J. Ceballos-Cáceres, M. Muñoz-Díaz, L. Carranza-González, A. Arias-Drake, J.M. Mora-Gutiérrez and M.A. Lagos-Florido
Conference - European Conference on Circuit Theory and Design ECCTD 2013
[abstract]
Many image sensors employ column-parallel ADCs in their readout structures. Single-slope ADCs are ideally suited for these multi-channel applications due to their simplicity, low power and small overall area. The ramp generator, shared by all the converters in the readout architecture, is a key element that has a direct effect in the transfer characteristic of single-slope ADCs. Because a digital counter is inherently present in this conversion scheme, one common practice is to use a digital-to-analog converter driven by the counter to generate the ramp. Given the direct relationship between the DAC and the ADC transfer characteristics, one of the main issues is to ensure a sufficient linearity of the DAC, with special emphasis on its monotonicity. Very often, in particular when medium to high resolutions are aimed, this requires calibration of the DAC, which must be repeated every once in a while to account for temperature, process, power supply, and aging variations. This paper presents an inherently monotonic ramp generator with high levels of linearity and stability against any expected source of variations, combined with a very efficient realization and an inherent automatic adaptability to different resolutions. The ramp generator has been designed using radiation hardening by design (RHBD) techniques, allowing its use in space applications.

SEE Characterization of the AMS 0.35 μm CMOS Technology
J. Ramos-Martos, A. Arias-Drake, J.M. Mora-Gutiérrez, M. Muñoz-Díaz, A. Ragel-Morales, B. Piñero-García, J. Ceballos-Cáceres, L. Carranza-González, S. Sordo-Ibáñez, M.A. Lagos-Florido and S. Espejo-Meana
Conference - European Conference on Radiation and Its Effects on Components and Systems RADECS 2013
[abstract]
This work presents experimental results for the single-event effects characterization of a commercial (Austria Microsystems) 0.35 ΣΔm CMOS technology. It improves and expands previous results. The knowledge gained is being applied in the development of a RHBD digital library.

Design Methodology and Development of Mixed-Signal ASICs for Space Applications in Standard CMOS Technology
S. Sordo-Ibáñez, B. Piñero-García, M. Muñoz-Díaz, A. Ragel-Morales, J. Ceballos-Cáceres, L. Carranza-González, S. Espejo-Meana, A. Arias-Drake, J. Ramos-Martos, J.M. Mora-Gutiérrez and M.A. Lagos-Florido
Conference - IEEE/IFIP International Conference on VLSI and System-on-Chip VLSI-SoC 2013
[abstract]
The design of mixed-signal ASICs for on-board space applications can provide several advantages that would not otherwise be possible with discrete components. However, extreme environmental conditions in terms of radiation and temperature imply a detailed knowledge of the technology used while CMOS commercial foundries do not usually have or make available these data. The aim of this work is to overcome these obstacles and offer solutions for space applications based on mixed-signal ASICs in commercial CMOS technologies. This paper presents the methodology followed for the assessment of a commercial (Austria Microsystems, AMS) 0.35 µm CMOS technology and for the development of a radiation hardened by design (RHBD) digital library. In addition, the described methodology has been applied to the development of two mixed-signal ASICs. The first chip performs the function of an optical digital transceiver for diffused-light intra-satellite optical communications. The second one implements a front-end solution for sensor data acquisition and signal conditioning and consists in a set of configurable multi-mode dual slope ADCs with resolution up to 16 bits.

A Front-End ASIC for a 16-Bit Three-Axis Magnetometer for Space Applications Based on Anisotropic Magnetoresistors
S. Sordo-Ibáñez, B. Piñero-García, M. Muñoz-Díaz, A. Ragel-Morales, J. Ceballos-Cáceres, L. Carranza-González, S. Espejo-Meana, A. Arias-Drake, J. Ramos-Martos, J.M. Mora-Gutiérrez and M.A. Lagos-Florido
Conference - Conference on the Design of Circuits and Integrated Systems DCIS 2013
[abstract]
Many space applications require the measurement of magnetic fields. This includes many scientific and meteorological instruments, as well as satellite attitude control systems. The most widely used method for measuring magnetic fields in space missions has been the use of fluxgate sensors, mainly due to their reliability, robustness and relatively small mass and volume with respect to the total size of the satellite. However, the current trends of cost reduction and standardization in aerospace technology tends towards the design of small satellites, commonly called nano-satellites or even picosatellites, embodying a new challenge in the design of low-cost space instrumentation. In this scope, fluxgate sensors are massy and large enough so that their use is not addressable for these small satellites. This paper presents an alternative design of a three-axis magnetometer for the measurement of the strength and direction of an incident magnetic field in space applications, with a significant reduction in mass and volume while maintaining a high detectivity. The proposed system uses magnetic field sensors based on anisotropic magnetoresistances (AMR) and a radiation hardened by design (RHBD) mixed-signal ASIC that performs signal conditioning and analog to digital conversion up to 16 bits, and also handles calibration tasks, system configuration and communication with the outside. The use of an ASIC instead of discrete components reduces both weight and volume, and achieves improvements in performance and consumption. The proposed magnetometer provides high sensitivy to low magnetic fields up to 30 μG of resolution while offering a small, low cost and reliable solution for space applications.

Design and experimental results of a preamplifier for particles tracking in secondary electron detectors
A. Garzón-Camacho, B. Fernández, Marcos A.G. Álvarez, J. Ceballos and J.M. de la Rosa
Journal Paper - Microelectronics Journal, vol. 44, pp 1-5, 2013
ELSEVIER    DOI: 10.1016/j.mejo.2012.12.009    ISSN: 0026-2692    » doi
[abstract]
This paper presents the design and experimental characterization of a preamplifier used in the electronic front-end of low-pressure gaseous secondary electron detectors. The circuit-implemented in a printed circuit board as a proof of concept has been designed to cope with the specifications of the readout electronics used in spatial (beam particle position) measurements. Experimental results show a transimpedance gain of 80 dBΩ, an overall voltage gain of 18 dB, a peak signal-to-noise ratio of 36.5 dB and a shaping time frame of 140-170 ns. These features improve the performance of previous reported approaches to the problem, and allow us to minimize the overlapping probability in secondary electron detections for radioactive ion beams tracking, achieving a counting rate higher than 10(6) particles per second.

OWLS: A Mixed-Signal Asic for Optical Wire-Less Links in Space Instruments
J. Ramos-Martos, A. Arias-Drake, A. Ragel-Morales, J. Ceballos-Cáceres, J.M. Mora-Gutiérrez, B. Piñero-García, M. Muñoz-Díaz, M.A. Lagos-Florido, S. Sordo-Ibáñez, S. Espejo-Meana, I. Arruego, J. Martínez-Oter and M.T. Álvarez
Conference - Int. Workshop on Analogue and Mixed Signal Integrated Circuits For Space Applications AMICSA 2012
[abstract]
This paper describes the design of a mixed-signal ASIC for space application and the techniques employed for radiation hardening and temperature effects compensation. The work is part of a planned long-term effort and collaboration between "Instituto de Microelectrónica de Sevilla (IMSE)", "Universidad de Sevilla (US)", and "Instituto Nacional de Técnica Aeroespacial (INTA)" aimed to consolidate a group of experienced mixed-signal space-ASIC designers.

Evaluation of the AMS 0.35μm CMOS Technology for use in Space Applications
J. Ramos-Martos, A. Arias-Drake, A. Ragel-Morales, J. Ceballos-Cáceres, J.M. Mora-Gutiérrez, B. Piñero-García, M. Muñoz-Díaz, M.A. Lagos-Florido, S. Sordo-Ibáñez and S. Espejo-Meana
Conference - Int. Workshop on Analogue and Mixed Signal Integrated Circuits For Space Applications AMICSA 2012
[abstract]
The design of mixed-signal application specific integrated circuits (ASICs) requires a detailed knowledge of the behavior of the technology which exceeds the needs of digital designs. For space applications, with its extended-temperature and radiation environment, the job of the mixed-signal designer is made even more difficult as in most cases commercial foundries do not have or make available data on the behavior of their devices under those nonstandard conditions.

Design and Measurements of a Preamplifier for Particles Tracking in Secondary Electrons Detectors
A. Garzón-Camacho, B. Fernández, M.A.G. Álvarez, J. Ceballos and J.M. de la Rosa
Conference - Conference on Design of Circuits and Integrated Systems DCIS 2011
[abstract]
This paper presents a preamplifier design and experimental characterisation to be used in the Front-End Electronic (FEE) requiered for spatial resolution measurements in low-pressure gaseous Secondary Electrons Detectors (Se D). The circuit - implemented in a Printed Circuit Board (PCB) as a probe of concept - achieves a transimpedance of 80dB, a DC-gain of 18dB, a Signal-to-Noise Ratio (SNR) of 36dB and a chaping time of 140-170ns. These characteristics allow us to minimise the overlapping probability in tracking detection for Radioactive Ion Beams (RIB) with a counting rate higher than 10(6) particles per second.

Radiation Characterization of the austriamicrosystems 0.35 μm CMOS Technology
J. Ramos-Martos, A. Arias-Drake, A. Ragel-Morales, J. Ceballos-Cáceres, J.M. Mora-Gutiérrez, B. Piñero.García, M. Muñoz-Díaz, M.A. Lagos-Florido and S. Espejo-Meana
Conference - Conference on Radiation Effects on Components and Systems RADECS 2011
[abstract]
The design of mixed-signal ASICs for space requires a detailed knowledge of the behaviour of the technology to be used in an environment imposing radiation levels and temperatures beyond those found in standard applications. Commercial foundries providing standard CMOS technologies do not usually have or make available data on the behaviour of their devices under those conditions. Instituto de Microelectrónica de Sevilla and Universidad de Sevilla (IMSE-USE) have started a long term collaboration with the Spanish Instituto Nacional de Técnica Aeroespacial (INTA) to extend its experience on mixed-signal design to the field of ASICs for space applications. The assessment of a commercial (austriamicrosystems) 0.35 μm CMOS technology is a first step towards the development of a mixed-signal design methodology, including an RHBD digital library suitable for use in space conditions.

A 10 μm Thick Poly-Sige gyroscope processed above 0.35 μm CMOS
A. Scheurle, T. Fuchs, K. Kehr, C. Leinenbach, S. Kronmüller, A. Arias, J. Ceballos, M.A. Lagos, J.M. Mora, J.M. Muñoz, A. Ragel, J. Ramos, S. Van Aerde, J. Spengler, A. Mehta, A. Verbist, B. Du Bois, A. Witvrouw
Conference - IEEE International Conference on Micro Electro Mechanical Systems MEMS 2007
[abstract]
This paper describes a monolithically integrated omegaz-gyroscope fabricated in a surface-micromaching technology. As functional structure, a 10 μm thick Silicon-Germanium layer is processed above a standard high voltage 0.35 μm CMOS-ASIC. Drive and Sense of the in plane double wing gyroscope is fully capacitively. Measurement of movement is also done fully capacitively in continuous-time baseband sensing. For characterization, the gyroscope chip is mounted on a breadboard with auxiliary circuits. A noise floor of 0.01 degs/sqrt(Hz) for operation at 3 mBar is achieved.

Processing of MEMS Gyroscopes on Top of CMOS ICs
A. Witvrouw, A. Mehta, A. Verbist, B. Du Bois, S. Van Aerde, J. Ramos-Martos, J. Ceballos, A. Ragel, J.M. Mora, M.A. Lagos, A. Arias, J.M. Hinojosa, J. Spengler, C. Leinenbach, T. Fuchs and S. Kronmüller
Conference - IEEE International Solid-State Conference ISSCC 2005
[abstract]
Integrated 10 μm thick poly-SiGe gyroscopes are processed on top of an 8" standard 0.35 μm CMOS wafer with 5 metal levels by using an advanced plasma-enhanced chemical vapor deposition multi-layer technology. The gyroscopes are free-moving with Q-factors for the drive mode up to 10000 at the pressure of 0.8 mTorr while the CMOS chip is fully functional.

SIGEM, low-temperature deposition of Poly-SiGe MEMs structures on standard CMOS circuits
J. Ramos-Martos, J. Ceballos-Cáceres, A. Ragel-Morales, J.M. Mora-Gutierrez, A. Arias-Drake, M.A. Lagos-Florido, J.M. Muñoz-Hinojosa, A. Mehta, A. Verbist, B. du Bois, K. Kehr, C. Leinenbach, S. Van Aerde, J. Spengler and A. Witvrouw
Conference - Conference on VLSI Circuits and Systems II SPIE 2005
[abstract]
Fabrication of surface-micromachined structures by a post-processing module above standard IC circuits is an efficient way to produce monolithic microsystems, allowing nearly independent optimization of the circuitry and the MEMS process. However, until now the high-temperature steps needed for deposition of poly-Si have limited its application. SiGeM explores the possibilities offered by the low-temperature (450 degrees C) deposition and structuring of poly-SiGe layers, which is compatible with the temperature budget of fully-processed standard IC wafers. In the SiGeM project several low-temperature deposition methods (CVD, PECVD, LPCVD) were developed, and were evaluated with respect to growth rate and material quality. The interconnection technology to the underlying CMOS circuitry was also developed. The capabilities of this new integration technology will be demonstrated in a monolithic high-performance rate-of-turn sensor, currently considered the most demanding MEMs application in terms of material properties of the structural layer (thickness > 10 mu m, stress gradient < 03MPa/mu m) and signal processing circuitry (capacitance resolution in the aF range, SNR > 110 dB). System partitioning will combine analog and DSP circuit techniques to maximize resolution and stability. Parasitic electrical coupling within different parts of the system has been analyzed, and countermeasures to reduce it have been incorporated in the design. The feasibility of the approach has already been proved by preliminary characterization of working prototypes containing released microstructures deposited on top of preamplifier circuits built on a 0.35 mu m, 5-metal, 2-poly, standard CMOS process from Philips Semiconductors. Resonance frequencies are in good agreement with predictions, and quality factors above 8000 have been obtained at pressures of 0.8 mTorr. Measured SNR confirms the capability to achieve a resolution of 0.015 degrees/s over a bandwidth of 50 Hz.

A precise 90 degrees quadrature OTA-C VCO between 50-130 MHz
B. Linares-Barranco, T. Serrano-Gotarredona, J. Ramos-Martos, J. Ceballos-Cáceres, J.M. Mora and A. Linares-Barranco
Conference - International Symposium on Circuits and Systems ISCAS 2004
[abstract]
We present a VLSI continuous time sinusoidal OTA-C quadrature oscillator fabricated in a standard double-poly 0.8mum CMOS process. The oscillator is tunable in the frequency range from 50-130 MHz. A symmetric topology assures that the two phases produced by the oscillator present an extremely low phase difference error (less than 2degrees over the whole frequency range). A novel current mode amplitude control scheme is developed that allows for very small amplitudes. Experimental results are provided.

A precise 90 degrees quadrature OTA-C oscillator tunable in the 50-130-MHz range
B. Linares-Barranco, T. Serrano-Gotarredona, J. Ramos-Martos, J. Ceballos-Cáceres, J.M. Mora and A. Linares-Barranco
Journal Paper - IEEE Transactions on Circuits and Systems I-Regular Papers, vol. 51, no. 4, pp 649-663, 2004
IEEE    DOI: 10.1109/TCSI.2004.823673    ISSN: 1057-7122    » doi
[abstract]
We present a very-large-scale integration continuous-time sinusoidal operational transconductance amplifiers quadrature oscillator fabricated in a standard double-poly 0.8-mum CMOS process. The oscillator is tunable in the frequency range from 50 to 130 MHz. The two phases produced by the oscillator show a low-quadrature phase error. A novel current-mode amplitude control scheme is developed that allows for very small amplitudes. Stability of the amplitude control loop is studied as well as design considerations for its optimization. Experimental results are provided.

Precise 90 degrees quadrature current-controlled oscillator tunable between 50-130 MHz
B. Linares-Barranco, T. Serrano-Gotarredona, J. Ramos-Martos, J. Ceballos-Cáceres, J.M. Mora and A. Linares-Barranco
Journal Paper - Electronics Letters, vol. 39, no. 11, pp 823-825, 2003
IEEE    DOI: 10.1049/el:20030558    ISSN: 0013-5194    » doi
[abstract]
A VLSI continuous time sinusoidal OTA-C quadrature oscillator fabricated in a standard double-poly 0.8 mum CMOS process is presented. The oscillator is tunable in the frequency range from 50-130 MHz. The two phases produced by the oscillator show an extremely low phase difference error (less than 2degrees over the whole frequency range). A novel current mode amplitude control scheme is developed that allows for very small amplitudes. Experimental results are provided.

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