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Research Units » Micro/Nanometric Circuits and Systems » Sigma-Delta Data Converters

Sigma-Delta Data Converters

Contact:

José M. de la Rosa Utrera

jrosaimse-cnmcsices

Keywords: sigma-delta modulators; analog-to-digital converters; oversampling analog-to-digital converters; RF-to-digital sigma-delta converters; sigma-delta radio receivers; behavioral modeling, simulation and optimization

Description
This research line deals with the analysis, modeling, design, implementation and experimental characterization of Sigma-Delta Modulators (SDMs) integrated in nanometer CMOS technologies. Different application scenarios are considered, spanning from sensor interfaces to broadband wireless communications. A number of Integrated Circuits (ICs) have been (and are being) developed, considering several circuit techniques, namely: discrete-time (switched-capacitor and switched-current), continuous-time (active-RC, Gm-C, Gm-LC) and hybrid continuous-time/discrete-time circuits.
The research activities carried out in the last five years have been focused on the design of SDMs intended for wireless communications, software defined radio and IoT devices. In these topics, several state-of-the-art IC prototypes have been designed in cutting-edge nanometer CMOS technologies. The design of these ICs has been supported and fueled by design methodologies and CAD tools, specifically developed to systematize the synthesis and verification procedure and to optimize the performance in terms of target specifications with minimized power consumption. An example of these CAD tools is SIMSIDES, a time-domain behavioral simulator for SDMs developed in the MATLAB/SIMULINK environment. Since the first version of SIMSIDES was developed in 2003, the tool has been continuously updated and improved with new models and facilities, and has been distributed to a number of universities, research institutes and companies all over the world.
Microphotograph of a programmable SC lowpass cascade Sigma-Delta Modulator for SDR applications, implemented in a 90-nm CMOS technology
Microphotograph of a CT bandpass Sigma-Delta Modulator for RF digitization, implemented using Gm-LC circuits in a 65-nm CMOS technology
Research Highlights
J.M. de la Rosa and R. del Río, CMOS Sigma-Delta Converters: Practical Design Guide, Wiley-IEEE Press, (2nd Edition in press), 2018 » link
M. Honarparvar, J.M. de la Rosa, F. Nabki and M. Sawan, "SMASH Delta-Sigma Modulator with Adderless Feed-forward Loop Filter", IET Electronics Letters, vol. 8, pp. 532-534, 2017 » doi
J.M. de la Rosa, R. Schreier, K.P. Pun and S. Pavan, "Next-Generation Delta-Sigma Converters: Trends and Perspectives", IEEE J. on Emerging and Selected Topics in Circuits and Systems, vol. 5, pp. 484-499, 2015 » doi
G. Molina-Salgado, A. Morgado, Gordana Jovanovic-Dolecek and J.M. de la Rosa, "LC-based Bandpass Continuous-Time Sigma-Delta Modulators with Widely Tunable Notch Frequency", IEEE Trans. on Circuits and Systems - I: Regular Papers, vol. 61, pp. 1442-1455, 2014 » doi
J.M. de la Rosa, "Sigma-Delta Modulators: Tutorial Overview, Design Guide and State-of-the-Art Survey", IEEE Trans. on Circuits and Systems I: Regular Papers, pp. 1-21, 2011 » doi
Key Research Projects & Contracts
ARAMIS: Adaptive RF and Mixed-signal Integrated Systems for 4G Wireless Telecom (TEC2007-67247-C02-00/MIC) » web
PI: José M. de la Rosa Utrera
Funding Body: C.I.C.Y.T.
Oct 2007 - Sep 2010
FENIX-SDR: Flexible Nanometer CMOS Analog Integrated Circuits for the Next Generation of Software-Defined-Radio Mobile Terminals (TEC2010-14825/MIC) » web
PI: José M. de la Rosa Utrera
Funding Body: Min. de Ciencia e Innovación
Jan 2011 - Dec 2013
MARAGDA:  Multilevel approach to the reliability-aware design of analog and digital integrated circuits (TEC2013-45638- C3-3-R) » web
PI: Francisco V. Fernández Fernández
Funding Body: Min. de Economía y Competitividad
Jan 2014 - Dec 2016
TOGHETHER: Towards Trusted Low-Power Things: Devices, Circuits and Architectures (TEC2016-75151-C3-3-R)
PI: Francisco V. Fernández Fernández & Rafael Castro López
Funding Body: Min. de Economía, Industria y Competitividad
Dec 2016 - Dec 2019
FLEXICS: Design techniques of low-cost, low-consumption, flexible and reconfigurable micro-nanoelectronic circuits and systems with application to wireless communications (P12-TIC-1481)
PI: Francisco V. Fernández Fernández
Funding Body: Junta de Andalucía
Jan 2014 - Feb 2019