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Research Units » Micro/Nanometric Circuits and Systems » Adaptive CMOS Analog/RF Integrated Circuits and Systems

Adaptive CMOS Analog/RF Integrated Circuits and Systems

Contact:

José M. de la Rosa Utrera

jrosaimse-cnmcsices

Keywords: radio-frequency (RF) circuits; multi-standard wireless communication systems; digitally programable RF CMOS integrated circuits; software defined radio (SDR); tunable low-noise amplifiers (LNAs); passive devices for RF applications; digital-assisted analog/RF circuits; energy scavenging/harvesting techniques

Description
This research line focuses on the systematic design of adaptive, reconfigurable analog and RF CMOS integrated circuits and systems for multi-standard wireless transceivers to be used in software-defined radio and IoT applications.
The main activities carried out in this research line can be grouped into two main categories:
  • Development of highly programmable analog front-ends suitable for SDR receivers, based on an extensive use of digitally-assisted RF circuits, with minimized system complexity, maximization of shared building blocks, high robustness to circuit imperfections and reduced power consumption.
  • Design, implementation and experimental characterization of reconfigurable analog/RF ICs using nanometer CMOS technologies, capable of being continuously tunable and adaptable to a variable set of radio environment parameters, standard specifications, signal conditions and battery status.
The design activities are being supported and fueled by suitable design methodologies and CAD tools, specifically developed to systematize the synthesis and verification procedure, and to optimize the performance of RF circuits and systems in terms of their target specifications with minimized power consumption. A good example is a SIMULINK block set specifically developed for the behavioral modeling and high-level simulation of RF receiver front-ends.
Microphotograph of a continuously-Tuned 1.75-2.23GHz adaptive inductively-degenerated comon-source LNA integrated in a 1-V 90-nm CMOS technology
Microphotograph of a folded-cascode LNA for multi-standard wireless transceivers integrated in a 1-V 90-nm CMOS technology
Research Highlights
E.C. Becerra-Alvarez, F. Sandoval-Ibarra and J.M. de la Rosa: "Flexible Nanometer CMOS Low-Noise Amplifiers for the Next-Generation Software-Defined-Radio Mobile Systems", in E. Tlelo-Cuautle (Ed.), Integrated Circuits for Analog Signal Processing, pp. 145-169, Springer, 2013 » doi
J.M. Dores, E.C. Becerra-Alvarez, M.A. Martins, J.M. de la Rosa and J.R. Fernandes, "Efficient Biasing Circuit Strategies for Inductorless Wideband Low Noise Amplifiers with Feedback", Microelectronics Journal, vol. 43, pp. 714-720, 2012 » doi
J.M. Dores, E. Becerra-Alvarez, M.A. Martins, J.M. de la Rosa and J.R. Fernandes, "A Comparative Study of Biasing Circuits for an Inductorless Wideband Low Noise Amplifier", Proceeding of the IEEE Int. Midwest Symposium on Circuits and Systems (MWSCAS), Seoul, Korea, 2011 » doi
E.C. Becerra-Alvarez, F. Sandoval-Ibarra and J.M. de la Rosa, "Design Considerations and Experimental Characterization Results of Continuously-Tuned Reconfigurable CMOS LNAs", Proceeding of the IEEE International Symposium on Circuits and Systems (ISCAS), Río de Janeiro, Brazil, 2011 » doi
E.C. Becerra-Alvarez, F. Sandoval-Ibarra and J.M. de la Rosa, "Design of a 1-V 90-nm CMOS Folded Cascode LNA for Multi-Standard Applications", Proceeding of the IEEE Int. Midwest Symposium on Circuits and Systems (MWSCAS), Seattle, USA, 2010 » doi
Key Research Projects & Contracts
ARAMIS: Adaptive RF and Mixed-signal Integrated Systems for 4G Wireless Telecom (TEC2007-67247-C02-00/MIC) » web
PI: José M. de la Rosa Utrera
Funding Body: C.I.C.Y.T.
Oct 2007 - Sep 2010
FENIX-SDR: Flexible Nanometer CMOS Analog Integrated Circuits for the Next Generation of Software-Defined-Radio Mobile Terminals (TEC2010-14825/MIC) » web
PI: José M. de la Rosa Utrera
Funding Body: Min. de Ciencia e Innovación
Jan 2011 - Dec 2013
MARAGDA:  Multilevel approach to the reliability-aware design of analog and digital integrated circuits (TEC2013-45638- C3-3-R) » web
PI: Francisco V. Fernández Fernández
Funding Body: Min. de Economía y Competitividad
Jan 2014 - Dec 2016
TOGHETHER: Towards Trusted Low-Power Things: Devices, Circuits and Architectures (TEC2016-75151-C3-3-R)
PI: Francisco V. Fernández Fernández & Rafael Castro López
Funding Body: Min. de Economía, Industria y Competitividad
Dec 2016 - Dec 2019
FLEXICS: Design techniques of low-cost, low-consumption, flexible and reconfigurable micro-nanoelectronic circuits and systems with application to wireless communications (P12-TIC-1481)
PI: Francisco V. Fernández Fernández
Funding Body: Junta de Andalucía
Jan 2014 - Feb 2019